diff options
| author | Yicong Yang <yangyicong@hisilicon.com> | 2023-08-14 20:40:12 +0800 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2023-08-15 12:50:53 +0100 |
| commit | 0242737dc4eb9f6e9a5ea594b3f93efa0b12f28d (patch) | |
| tree | d2fb73c51f6d8711c94248be23b6a581175a2abe /include/linux/acpi_iort.h | |
| parent | 90d68677226ac7cf344648919df2016686b3e2ab (diff) | |
perf/smmuv3: Enable HiSilicon Erratum 162001900 quirk for HIP08/09
Some HiSilicon SMMU PMCG suffers the erratum 162001900 that the PMU
disable control sometimes fail to disable the counters. This will lead
to error or inaccurate data since before we enable the counters the
counter's still counting for the event used in last perf session.
This patch tries to fix this by hardening the global disable process.
Before disable the PMU, writing an invalid event type (0xffff) to
focibly stop the counters. Correspondingly restore each events on
pmu::pmu_enable().
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Link: https://lore.kernel.org/r/20230814124012.58013-1-yangyicong@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'include/linux/acpi_iort.h')
| -rw-r--r-- | include/linux/acpi_iort.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/acpi_iort.h b/include/linux/acpi_iort.h index ee7cb6aaff71..1cb65592c95d 100644 --- a/include/linux/acpi_iort.h +++ b/include/linux/acpi_iort.h @@ -21,6 +21,7 @@ */ #define IORT_SMMU_V3_PMCG_GENERIC 0x00000000 /* Generic SMMUv3 PMCG */ #define IORT_SMMU_V3_PMCG_HISI_HIP08 0x00000001 /* HiSilicon HIP08 PMCG */ +#define IORT_SMMU_V3_PMCG_HISI_HIP09 0x00000002 /* HiSilicon HIP09 PMCG */ int iort_register_domain_token(int trans_id, phys_addr_t base, struct fwnode_handle *fw_node); |