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authorStephen Boyd <sboyd@kernel.org>2018-12-14 13:34:47 -0800
committerStephen Boyd <sboyd@kernel.org>2018-12-14 13:34:47 -0800
commit58c05c823b8347daf03a8448e38318820fad6645 (patch)
tree6bfad6c899a2a2d68cdbceb2a04cdadd87d0af28 /include/linux/clk-provider.h
parentffe05540d18013db62c43627836a3638e9a2c7aa (diff)
parentb1260067ac3dd5dcd40bcbcb2cc116a9f8b5016b (diff)
parent3cc48976e9763209ccf0ccc47c8e3e5fc464c557 (diff)
parent929914946fa615889d176568b175984e5128e0a3 (diff)
parent1e3121bfe51a3424050ae66326e8a113f0ed7fb8 (diff)
parentd360b130e210f2468b2ff9cae5177c6cba780e83 (diff)
Merge branches 'clk-imx7ulp', 'clk-imx6-fixes', 'clk-imx-fixes', 'clk-imx8qxp' and 'clk-imx8mq' into clk-next
- NXP i.MX7ULP SoC clock support - Support for i.MX8QXP SoC clocks - Support for NXP i.MX8MQ clock controllers * clk-imx7ulp: clk: imx: add imx7ulp clk driver clk: imx: implement new clk_hw based APIs clk: imx: make mux parent strings const dt-bindings: clock: add imx7ulp clock binding doc clk: imx: add imx7ulp composite clk support clk: imx: add pfdv2 support clk: imx: add pllv4 support clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support clk: imx: add gatable clock divider support * clk-imx6-fixes: clk: imx6q: handle ENET PLL bypass clk: imx6q: optionally get CCM inputs via standard clock handles clk: imx6q: reset exclusive gates on init * clk-imx-fixes: clk: imx6q: add DCICx clocks gate clk: imx6sl: ensure MMDC CH0 handshake is bypassed clk: imx7d: remove UART1 clock setting * clk-imx8qxp: clk: imx: add imx8qxp lpcg driver clk: imx: add lpcg clock support clk: imx: add imx8qxp clk driver clk: imx: add scu clock common part clk: imx: add configuration option for mmio clks dt-bindings: clock: add imx8qxp lpcg clock binding dt-bindings: clock: imx8qxp: add SCU clock IDs firmware: imx: add pm svc headfile dt-bindings: fsl: scu: update power domain binding firmware: imx: remove resource id enums dt-bindings: imx: add scu resource id headfile * clk-imx8mq: clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependant clk: imx: remove redundant initialization of ret to zero clk: imx: Add SCCG PLL type clk: imx: Add fractional PLL output clock clk: imx: Add clock driver for i.MX8MQ CCM clk: imx: Add imx composite clock dt-bindings: Add binding for i.MX8MQ CCM