diff options
author | Chang S. Bae <chang.seok.bae@intel.com> | 2024-10-01 09:10:36 -0700 |
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committer | Borislav Petkov (AMD) <bp@alien8.de> | 2024-10-25 18:12:03 +0200 |
commit | 9a819753b0209c6edebdea447a1aa53e8c697653 (patch) | |
tree | 7f970939683b10a9fb69a3412833463f2b8916b4 /include/linux/dlm_plock.h | |
parent | 42f7652d3eb527d03665b09edac47f85fb600924 (diff) |
x86/microcode/intel: Remove unnecessary cache writeback and invalidation
Currently, an unconditional cache flush is performed during every
microcode update. Although the original changelog did not mention
a specific erratum, this measure was primarily intended to address
a specific microcode bug, the load of which has already been blocked by
is_blacklisted(). Therefore, this cache flush is no longer necessary.
Additionally, the side effects of doing this have been overlooked. It
increases CPU rendezvous time during late loading, where the cache flush
takes between 1x to 3.5x longer than the actual microcode update.
Remove native_wbinvd() and update the erratum name to align with the
latest errata documentation, document ID 334163 Version 022US.
[ bp: Zap the flaky documentation URL. ]
Fixes: 91df9fdf5149 ("x86/microcode/intel: Writeback and invalidate caches before updating microcode")
Reported-by: Yan Hua Wu <yanhua1.wu@intel.com>
Reported-by: William Xie <william.xie@intel.com>
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Acked-by: Ashok Raj <ashok.raj@intel.com>
Tested-by: Yan Hua Wu <yanhua1.wu@intel.com>
Link: https://lore.kernel.org/r/20241001161042.465584-2-chang.seok.bae@intel.com
Diffstat (limited to 'include/linux/dlm_plock.h')
0 files changed, 0 insertions, 0 deletions