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authorHector Martin <marcan@marcan.st>2021-03-25 22:50:19 +0900
committerHector Martin <marcan@marcan.st>2021-04-08 20:18:38 +0900
commitb10eb2d50911f98a8f1cacf00b1b677339593f4c (patch)
tree41560ebf96bed97c67061c8b00addc058ca78f48 /include/linux/io.h
parent9a63ae85025526a6a5f432cfe41b6df649798aa4 (diff)
asm-generic/io.h: implement pci_remap_cfgspace using ioremap_np
Now that we have ioremap_np(), we can make pci_remap_cfgspace() default to it, falling back to ioremap() on platforms where it is not available. Remove the arm64 implementation, since that is now redundant. Future cleanups should be able to do the same for other arches, and eventually make the generic pci_remap_cfgspace() unconditional. Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Hector Martin <marcan@marcan.st>
Diffstat (limited to 'include/linux/io.h')
-rw-r--r--include/linux/io.h16
1 files changed, 8 insertions, 8 deletions
diff --git a/include/linux/io.h b/include/linux/io.h
index d718354ed3e1..61ff7d6278b6 100644
--- a/include/linux/io.h
+++ b/include/linux/io.h
@@ -82,20 +82,20 @@ void devm_memunmap(struct device *dev, void *addr);
#ifdef CONFIG_PCI
/*
* The PCI specifications (Rev 3.0, 3.2.5 "Transaction Ordering and
- * Posting") mandate non-posted configuration transactions. There is
- * no ioremap API in the kernel that can guarantee non-posted write
- * semantics across arches so provide a default implementation for
- * mapping PCI config space that defaults to ioremap(); arches
- * should override it if they have memory mapping implementations that
- * guarantee non-posted writes semantics to make the memory mapping
- * compliant with the PCI specification.
+ * Posting") mandate non-posted configuration transactions. This default
+ * implementation attempts to use the ioremap_np() API to provide this
+ * on arches that support it, and falls back to ioremap() on those that
+ * don't. Overriding this function is deprecated; arches that properly
+ * support non-posted accesses should implement ioremap_np() instead, which
+ * this default implementation can then use to return mappings compliant with
+ * the PCI specification.
*/
#ifndef pci_remap_cfgspace
#define pci_remap_cfgspace pci_remap_cfgspace
static inline void __iomem *pci_remap_cfgspace(phys_addr_t offset,
size_t size)
{
- return ioremap(offset, size);
+ return ioremap_np(offset, size) ?: ioremap(offset, size);
}
#endif
#endif