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authorMarc Zyngier <maz@kernel.org>2020-03-04 20:33:18 +0000
committerMarc Zyngier <maz@kernel.org>2020-03-24 12:05:09 +0000
commit7017ff0ee1de9d45fafee88a4e7890cce92f482e (patch)
treefaf2391e9623cf658c333c7b05950e7332515a09 /include/linux/irqchip/arm-gic-v4.h
parentb4e8d644ec623cbb66f192a7fefbd0a66e314be8 (diff)
irqchip/gic-v4.1: Plumb get/set_irqchip_state SGI callbacks
To implement the get/set_irqchip_state callbacks (limited to the PENDING state), we have to use a particular set of hacks: - Reading the pending state is done by using a pair of new redistributor registers (GICR_VSGIR, GICR_VSGIPENDR), which allow the 16 interrupts state to be retrieved. - Setting the pending state is done by generating it as we'd otherwise do for a guest (writing to GITS_SGIR). - Clearing the pending state is done by emitting a VSGI command with the "clear" bit set. This requires some interesting locking though: - When talking to the redistributor, we must make sure that the VPE affinity doesn't change, hence taking the VPE lock. - At the same time, we must ensure that nobody accesses the same redistributor's GICR_VSGIR registers for a different VPE, which would corrupt the reading of the pending bits. We thus take the per-RD spinlock. Much fun. Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Zenghui Yu <yuzenghui@huawei.com> Link: https://lore.kernel.org/r/20200304203330.4967-12-maz@kernel.org
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