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authorCatalin Marinas <catalin.marinas@arm.com>2013-01-14 18:05:37 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2013-03-26 16:12:02 +0000
commitc0114709ed85a5693eb74acdfa03d94f7f12e5b8 (patch)
tree372c5cee96580d73e638d25a2b169a64b82bc908 /include/linux/irqchip
parentaec0095653cd9812b9a15df0315364cc6d094c59 (diff)
irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
All the calls to gic_secondary_init() pass 0 as the first argument. Since this function is called on each CPU when starting, it can be done in a platform-independent way via a CPU notifier registered by the GIC code. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Tested-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Tested-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Nicolas Pitre <nico@linaro.org> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Will Deacon <will.deacon@arm.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Barry Song <baohua.song@csr.com>
Diffstat (limited to 'include/linux/irqchip')
-rw-r--r--include/linux/irqchip/arm-gic.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
index 3fd8e4290a1c..3e203eb23cc7 100644
--- a/include/linux/irqchip/arm-gic.h
+++ b/include/linux/irqchip/arm-gic.h
@@ -65,7 +65,6 @@ extern struct irq_chip gic_arch_extn;
void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
u32 offset, struct device_node *);
-void gic_secondary_init(unsigned int);
void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
static inline void gic_init(unsigned int nr, int start,