diff options
| author | Wolfram Sang <wsa+renesas@sang-engineering.com> | 2016-01-19 12:28:31 +0100 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2016-02-29 11:03:04 +0100 |
| commit | 04e24b80a3ddf4cdf85e49a99d33aec27c9432ad (patch) | |
| tree | bfb3997e7f5a191afac8a54101c4468c9cfc65fa /include/linux/mfd/tmio.h | |
| parent | 2bf8ab6ba23483a49d29a726d047f3be81ccc952 (diff) | |
mmc: tmio: add flag to reduce delay after changing clock status
The docs for RCar Gen2 & 3 I have access to, mention delays of 5ms after
stop and 1ms after start. Make it possible to apply these values.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'include/linux/mfd/tmio.h')
| -rw-r--r-- | include/linux/mfd/tmio.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h index 24b86d538e88..05d58ee5e6a7 100644 --- a/include/linux/mfd/tmio.h +++ b/include/linux/mfd/tmio.h @@ -65,6 +65,10 @@ * Some controllers can support SDIO IRQ signalling. */ #define TMIO_MMC_SDIO_IRQ (1 << 2) + +/* Some controllers don't need to wait 10ms for clock changes */ +#define TMIO_MMC_FAST_CLK_CHG (1 << 3) + /* * Some controllers require waiting for the SD bus to become * idle before writing to some registers. |