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authorMoshe Shemesh <moshe@nvidia.com>2023-05-17 11:53:50 +0300
committerSaeed Mahameed <saeedm@nvidia.com>2023-06-16 12:02:06 -0700
commit8bb42ed4210e342631f63d32f7ed87b722968da6 (patch)
tree242d326f7632c0d53e1531577d976fc0f25d4d53 /include/linux/mlx5/mlx5_ifc.h
parent92501fa6e4217aa0b85b092f91b2649b3c214a75 (diff)
net/mlx5: Expose timeout for sync reset unload stage
Expose new timoueout in Default Timeouts Register to be used on sync reset flow running on smart NIC. In this flow the driver should know how much time to wait from getting unload request till firmware will ask the PF to continue to next stage of the flow. Signed-off-by: Moshe Shemesh <moshe@nvidia.com> Reviewed-by: Shay Drory <shayd@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'include/linux/mlx5/mlx5_ifc.h')
-rw-r--r--include/linux/mlx5/mlx5_ifc.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 1f4f62cb9f34..14892e795808 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -3117,7 +3117,9 @@ struct mlx5_ifc_dtor_reg_bits {
struct mlx5_ifc_default_timeout_bits reclaim_vfs_pages_to;
- u8 reserved_at_1c0[0x40];
+ struct mlx5_ifc_default_timeout_bits reset_unload_to;
+
+ u8 reserved_at_1c0[0x20];
};
enum {