diff options
| author | Yevgeny Kliteynik <kliteyn@nvidia.com> | 2021-11-08 02:42:50 +0200 |
|---|---|---|
| committer | Saeed Mahameed <saeedm@nvidia.com> | 2021-12-31 00:17:34 -0800 |
| commit | f59464e257bdbd4df6df9a4505d7858a0baf6cf7 (patch) | |
| tree | 4241d823e573c61e2d4b0930fb177a7c0279629d /include/linux/mlx5 | |
| parent | 09753babaf464177b5998c7ebb25d495c4811833 (diff) | |
net/mlx5: DR, Add support for matching on geneve_tlv_option_0_exist field
Match on geneve_tlv_option_0_exist field on devices that support STEv1.
Signed-off-by: Muhammad Sammar <muhammads@nvidia.com>
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Diffstat (limited to 'include/linux/mlx5')
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index c74c5e147cb9..deaa0f71213f 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -372,7 +372,8 @@ struct mlx5_ifc_flow_table_fields_supported_bits { u8 reserved_at_37[0x9]; u8 geneve_tlv_option_0_data[0x1]; - u8 reserved_at_41[0x4]; + u8 geneve_tlv_option_0_exist[0x1]; + u8 reserved_at_42[0x3]; u8 outer_first_mpls_over_udp[0x4]; u8 outer_first_mpls_over_gre[0x4]; u8 inner_first_mpls[0x4]; @@ -551,7 +552,8 @@ struct mlx5_ifc_fte_match_set_misc_bits { u8 bth_opcode[0x8]; u8 geneve_vni[0x18]; - u8 reserved_at_d8[0x7]; + u8 reserved_at_d8[0x6]; + u8 geneve_tlv_option_0_exist[0x1]; u8 geneve_oam[0x1]; u8 reserved_at_e0[0xc]; |