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authorMiquel Raynal <miquel.raynal@bootlin.com>2020-09-30 01:01:12 +0200
committerMiquel Raynal <miquel.raynal@bootlin.com>2020-11-30 09:27:33 +0100
commit80fe603160a4732a08f0f08f3e3312a3f3a79eee (patch)
tree902b7fe685b9b47224d3983dcb06949b8449b6ba /include/linux/mtd
parentea146d7fbf5081b5eb2777df5e30ed70ca68985b (diff)
mtd: nand: ecc-bch: Stop using raw NAND structures
This code is meant to be reused by the SPI-NAND core. Now that the driver has been cleaned and reorganized, use a generic ECC engine object to store the driver's data instead of accessing members of the nand_chip structure. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-9-miquel.raynal@bootlin.com
Diffstat (limited to 'include/linux/mtd')
-rw-r--r--include/linux/mtd/nand-ecc-sw-bch.h25
1 files changed, 25 insertions, 0 deletions
diff --git a/include/linux/mtd/nand-ecc-sw-bch.h b/include/linux/mtd/nand-ecc-sw-bch.h
index f0caee3b03d0..ce005528e55f 100644
--- a/include/linux/mtd/nand-ecc-sw-bch.h
+++ b/include/linux/mtd/nand-ecc-sw-bch.h
@@ -9,6 +9,31 @@
#define __MTD_NAND_ECC_SW_BCH_H__
#include <linux/mtd/nand.h>
+#include <linux/bch.h>
+
+/**
+ * struct nand_ecc_sw_bch_conf - private software BCH ECC engine structure
+ * @reqooblen: Save the actual user OOB length requested before overwriting it
+ * @spare_oobbuf: Spare OOB buffer if none is provided
+ * @code_size: Number of bytes needed to store a code (one code per step)
+ * @nsteps: Number of steps
+ * @calc_buf: Buffer to use when calculating ECC bytes
+ * @code_buf: Buffer to use when reading (raw) ECC bytes from the chip
+ * @bch: BCH control structure
+ * @errloc: error location array
+ * @eccmask: XOR ecc mask, allows erased pages to be decoded as valid
+ */
+struct nand_ecc_sw_bch_conf {
+ unsigned int reqooblen;
+ void *spare_oobbuf;
+ unsigned int code_size;
+ unsigned int nsteps;
+ u8 *calc_buf;
+ u8 *code_buf;
+ struct bch_control *bch;
+ unsigned int *errloc;
+ unsigned char *eccmask;
+};
#if IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_BCH)