diff options
| author | Will Deacon <will.deacon@arm.com> | 2018-10-05 13:28:07 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2018-11-21 13:16:33 +0000 |
| commit | 342e53bd8548e07c6a734d2d3a6437ad6e6d3b09 (patch) | |
| tree | afafbc66fd14730b6713497135d23b2198dfc71f /include/linux/perf | |
| parent | d3adeed7289220fdc78ee4400efbcd4cf1556215 (diff) | |
arm64: perf: Add support for Armv8.1 PMCEID register format
Armv8.1 allocated the upper 32-bits of the PMCEID registers to describe
the common architectural and microarchitecture events beginning at 0x4000.
Add support for these registers to our probing code, so that we can
advertise the SPE events when they are supported by the CPU.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'include/linux/perf')
| -rw-r--r-- | include/linux/perf/arm_pmu.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h index bf309ff6f244..4641e850b204 100644 --- a/include/linux/perf/arm_pmu.h +++ b/include/linux/perf/arm_pmu.h @@ -102,8 +102,10 @@ struct arm_pmu { int (*filter_match)(struct perf_event *event); int num_events; bool secure_access; /* 32-bit ARM only */ -#define ARMV8_PMUV3_MAX_COMMON_EVENTS 0x40 +#define ARMV8_PMUV3_MAX_COMMON_EVENTS 0x40 DECLARE_BITMAP(pmceid_bitmap, ARMV8_PMUV3_MAX_COMMON_EVENTS); +#define ARMV8_PMUV3_EXT_COMMON_EVENT_BASE 0x4000 + DECLARE_BITMAP(pmceid_ext_bitmap, ARMV8_PMUV3_MAX_COMMON_EVENTS); struct platform_device *plat_device; struct pmu_hw_events __percpu *hw_events; struct hlist_node node; |