summaryrefslogtreecommitdiff
path: root/include/linux/phy
diff options
context:
space:
mode:
authorShawn Lin <shawn.lin@rock-chips.com>2022-08-25 21:38:34 +0200
committerVinod Koul <vkoul@kernel.org>2022-09-04 20:35:48 +0530
commit2e9bffc4f713db465177238f6033f7d367d6f151 (patch)
tree6c5811a02e99a37578826faebfe1bf0dfa0c59b9 /include/linux/phy
parent75be98eee8d8914e469f540e12f6078f42252acc (diff)
phy: rockchip: Support PCIe v3
RK3568 supports PCIe v3 using not Combphy like PCIe v2 on rk3566. It use a dedicated PCIe-phy. Add support for this. Initial support by Shawn Lin, modifications by Peter Geis and Frank Wunderlich. Add data-lanes property for splitting pcie-lanes across controllers. The data-lanes is an array where x=0 means lane is disabled and x > 0 means controller x is assigned to phy lane. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Suggested-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.kernel.org/r/20220825193836.54262-4-linux@fw-web.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'include/linux/phy')
-rw-r--r--include/linux/phy/pcie.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/include/linux/phy/pcie.h b/include/linux/phy/pcie.h
new file mode 100644
index 000000000000..e7ac81764576
--- /dev/null
+++ b/include/linux/phy/pcie.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
+ */
+#ifndef __PHY_PCIE_H
+#define __PHY_PCIE_H
+
+#define PHY_MODE_PCIE_RC 20
+#define PHY_MODE_PCIE_EP 21
+#define PHY_MODE_PCIE_BIFURCATION 22
+
+#endif