diff options
| author | Vladimir Oltean <vladimir.oltean@nxp.com> | 2024-06-15 20:00:27 +0800 |
|---|---|---|
| committer | Paolo Abeni <pabeni@redhat.com> | 2024-06-18 13:28:26 +0200 |
| commit | 777b8afb8179155353ec14b1d8153122410aba29 (patch) | |
| tree | 8d65d57afc43502f02fec7126a1c821e50531b94 /include/linux/phylink.h | |
| parent | 041cc86b3653cbcdf6ab96c2f2ae34f3d0a99b0a (diff) | |
net: phy: introduce core support for phy-mode = "10g-qxgmii"
10G-QXGMII is a MAC-to-PHY interface defined by the USXGMII multiport
specification. It uses the same signaling as USXGMII, but it multiplexes
4 ports over the link, resulting in a maximum speed of 2.5G per port.
Some in-tree SoCs like the NXP LS1028A use "usxgmii" when they mean
either the single-port USXGMII or the quad-port 10G-QXGMII variant, and
they could get away just fine with that thus far. But there is a need to
distinguish between the 2 as far as SerDes drivers are concerned.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'include/linux/phylink.h')
| -rw-r--r-- | include/linux/phylink.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/phylink.h b/include/linux/phylink.h index a30a692acc32..2381e07429a2 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -654,6 +654,7 @@ static inline int phylink_get_link_timer_ns(phy_interface_t interface) case PHY_INTERFACE_MODE_SGMII: case PHY_INTERFACE_MODE_QSGMII: case PHY_INTERFACE_MODE_USXGMII: + case PHY_INTERFACE_MODE_10G_QXGMII: return 1600000; case PHY_INTERFACE_MODE_1000BASEX: |