Merge tag 'pinctrl-v5.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v5.14 kernel. Not so
  much going on. No core changes, just drivers.

  The most interesting would be that MIPS Ralink is migrating to pin
  control and we have some bindings but not yet code for the Apple M1
  pin controller.

  New drivers:

   - Last merge window we created a driver for the Ralink RT2880. We are
     now moving the Ralink SoC pin control drivers out of the MIPS
     architecture code and into the pin control subsystem. This concerns
     RT288X, MT7620, RT305X, RT3883 and MT7621.

   - Qualcomm SM6125 SoC pin control driver.

   - Qualcomm spmi-gpio support for PM7325.

   - Qualcomm spmi-mpp also handles PMI8994 (just a compatible string)

   - Mediatek MT8365 SoC pin controller.

   - New device HID for the AMD GPIO controller.

  Improvements:

   - Pin bias config support for a slew of Renesas pin controllers.

   - Incremental improvements and non-urgent bug fixes to the Renesas
     SoC drivers.

   - Implement irq_set_wake on the AMD pin controller so we can wake up
     from external pin events.

  Misc:

   - Devicetree bindings for the Apple M1 pin controller, we will
     probably see a proper driver for this soon as well"

* tag 'pinctrl-v5.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (54 commits)
  pinctrl: ralink: rt305x: add missing include
  pinctrl: stm32: check for IRQ MUX validity during alloc()
  pinctrl: zynqmp: some code cleanups
  drivers: qcom: pinctrl: Add pinctrl driver for sm6125
  dt-bindings: pinctrl: qcom: sm6125: Document SM6125 pinctrl driver
  dt-bindings: pinctrl: mcp23s08: add documentation for reset-gpios
  pinctrl: mcp23s08: Add optional reset GPIO
  pinctrl: mediatek: fix mode encoding
  pinctrl: mcp23s08: Fix missing unlock on error in mcp23s08_irq()
  pinctrl: bcm: Constify static pinmux_ops
  pinctrl: bcm: Constify static pinctrl_ops
  pinctrl: ralink: move RT288X SoC pinmux config into a new 'pinctrl-rt288x.c' file
  pinctrl: ralink: move MT7620 SoC pinmux config into a new 'pinctrl-mt7620.c' file
  pinctrl: ralink: move RT305X SoC pinmux config into a new 'pinctrl-rt305x.c' file
  pinctrl: ralink: move RT3883 SoC pinmux config into a new 'pinctrl-rt3883.c' file
  pinctrl: ralink: move MT7621 SoC pinmux config into a new 'pinctrl-mt7621.c' file
  pinctrl: ralink: move ralink architecture pinmux header into the driver
  pinctrl: single: config: enable the pin's input
  pinctrl: mtk: Fix mt8365 Kconfig dependency
  pinctrl: mcp23s08: fix race condition in irq handler
  ...

1 files changed, 10 insertions, 10 deletions

diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctrl/pinconf-generic.h
index 5a96602a3316..eee0e3948537 100644
--- a/include/linux/pinctrl/pinconf-generic.h
+++ b/include/linux/pinctrl/pinconf-generic.h
@@ -81,28 +81,28 @@ struct pinctrl_map;
  *	passed in the argument on a custom form, else just use argument 1
  *	to indicate low power mode, argument 0 turns low power mode off.
  * @PIN_CONFIG_MODE_PWM: this will configure the pin for PWM
+ * @PIN_CONFIG_OUTPUT: this will configure the pin as an output and drive a
+ * 	value on the line. Use argument 1 to indicate high level, argument 0 to
+ *	indicate low level. (Please see Documentation/driver-api/pin-control.rst,
+ *	section "GPIO mode pitfalls" for a discussion around this parameter.)
  * @PIN_CONFIG_OUTPUT_ENABLE: this will enable the pin's output mode
  * 	without driving a value there. For most platforms this reduces to
  * 	enable the output buffers and then let the pin controller current
  * 	configuration (eg. the currently selected mux function) drive values on
  * 	the line. Use argument 1 to enable output mode, argument 0 to disable
  * 	it.
- * @PIN_CONFIG_OUTPUT: this will configure the pin as an output and drive a
- * 	value on the line. Use argument 1 to indicate high level, argument 0 to
- *	indicate low level. (Please see Documentation/driver-api/pin-control.rst,
- *	section "GPIO mode pitfalls" for a discussion around this parameter.)
  * @PIN_CONFIG_PERSIST_STATE: retain pin state across sleep or controller reset
  * @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power
  *	supplies, the argument to this parameter (on a custom format) tells
  *	the driver which alternative power source to use.
- * @PIN_CONFIG_SLEEP_HARDWARE_STATE: indicate this is sleep related state.
- * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to
- *	this parameter (on a custom format) tells the driver which alternative
- *	slew rate to use.
  * @PIN_CONFIG_SKEW_DELAY: if the pin has programmable skew rate (on inputs)
  *	or latch delay (on outputs) this parameter (in a custom format)
  *	specifies the clock skew or latch delay. It typically controls how
  *	many double inverters are put in front of the line.
+ * @PIN_CONFIG_SLEEP_HARDWARE_STATE: indicate this is sleep related state.
+ * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to
+ *	this parameter (on a custom format) tells the driver which alternative
+ *	slew rate to use.
  * @PIN_CONFIG_END: this is the last enumerator for pin configurations, if
  *	you need to pass in custom configurations to the pin controller, use
  *	PIN_CONFIG_END+1 as the base offset.
@@ -127,13 +127,13 @@ enum pin_config_param {
 	PIN_CONFIG_INPUT_SCHMITT_ENABLE,
 	PIN_CONFIG_MODE_LOW_POWER,
 	PIN_CONFIG_MODE_PWM,
-	PIN_CONFIG_OUTPUT_ENABLE,
 	PIN_CONFIG_OUTPUT,
+	PIN_CONFIG_OUTPUT_ENABLE,
 	PIN_CONFIG_PERSIST_STATE,
 	PIN_CONFIG_POWER_SOURCE,
+	PIN_CONFIG_SKEW_DELAY,
 	PIN_CONFIG_SLEEP_HARDWARE_STATE,
 	PIN_CONFIG_SLEW_RATE,
-	PIN_CONFIG_SKEW_DELAY,
 	PIN_CONFIG_END = 0x7F,
 	PIN_CONFIG_MAX = 0xFF,
 };