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authorweiyi.lu@mediatek.com <weiyi.lu@mediatek.com>2017-11-28 15:28:18 +0800
committerMatthias Brugger <matthias.bgg@gmail.com>2017-12-21 11:49:22 +0100
commitfa7e843a901d4ea6b092fea67406f85e8ec60b22 (patch)
tree716939671bf7f30cad930048a903d33b8c222938 /include/linux/soc
parent3dcf01c9707d49e8a38387f4dfe9f43dfb0e63eb (diff)
soc: mediatek: extend bus protection API
MT2712 add "set/clear" bus control register to each control register set instead of providing only one "enable" control register, we could avoid the read-modify-write racing by declaring "bus_prot_reg_update" as "false" in scp_soc_data or declaring as "true" to use the legacy update method. By improving the mtk-infracfg bus protection implementation to support set/clear bus protection control method by IC configuration. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'include/linux/soc')
-rw-r--r--include/linux/soc/mediatek/infracfg.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/include/linux/soc/mediatek/infracfg.h b/include/linux/soc/mediatek/infracfg.h
index e8d9f0d52933..b0a507d356ef 100644
--- a/include/linux/soc/mediatek/infracfg.h
+++ b/include/linux/soc/mediatek/infracfg.h
@@ -28,7 +28,8 @@
#define MT7622_TOP_AXI_PROT_EN_WB (BIT(2) | BIT(6) | \
BIT(7) | BIT(8))
-int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask);
-int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask);
-
+int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask,
+ bool reg_update);
+int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask,
+ bool reg_update);
#endif /* __SOC_MEDIATEK_INFRACFG_H */