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authorMarek Szyprowski <m.szyprowski@samsung.com>2010-06-30 14:27:37 -0600
committerGrant Likely <grant.likely@secretlab.ca>2010-07-03 22:45:44 -0600
commit3c8e1a84fd6b984a7bce8816db2e3defc57bbfe4 (patch)
tree52761ad5f2229d0b176ca36b7107a0ec43e1168f /include/linux/spi/spi_gpio.h
parent04bb2a031cf95b34b7432dd47b318a932a895b4c (diff)
spi/spi-gpio: add support for controllers without MISO or MOSI pin
There are some boards that do not strictly follow SPI standard and use only 3 wires (SCLK, MOSI or MISO, SS) for connecting some simple auxiliary chips and controls them with GPIO based 'spi controller'. In this configuration the MISO or MOSI line is missing (it is not required if the chip does not transfer any data back to host or host only reads data from chip). This patch adds support for such non-standard configuration in GPIO-based SPI controller. It has been tested in configuration without MISO pin. Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'include/linux/spi/spi_gpio.h')
-rw-r--r--include/linux/spi/spi_gpio.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/spi/spi_gpio.h b/include/linux/spi/spi_gpio.h
index ca6782ee4b9f..369b3d7d5b95 100644
--- a/include/linux/spi/spi_gpio.h
+++ b/include/linux/spi/spi_gpio.h
@@ -29,11 +29,16 @@
* SPI_GPIO_NO_CHIPSELECT to the controller_data:
* .controller_data = (void *) SPI_GPIO_NO_CHIPSELECT;
*
+ * If the MISO or MOSI pin is not available then it should be set to
+ * SPI_GPIO_NO_MISO or SPI_GPIO_NO_MOSI.
+ *
* If the bitbanged bus is later switched to a "native" controller,
* that platform_device and controller_data should be removed.
*/
#define SPI_GPIO_NO_CHIPSELECT ((unsigned long)-1l)
+#define SPI_GPIO_NO_MISO ((unsigned long)-1l)
+#define SPI_GPIO_NO_MOSI ((unsigned long)-1l)
/**
* struct spi_gpio_platform_data - parameter for bitbanged SPI master