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authorFabio Estevam <fabio.estevam@freescale.com>2015-09-08 22:18:14 -0300
committerPeter Chen <peter.chen@freescale.com>2015-10-22 09:24:25 +0800
commit1fbf46280eb6866c762de5ec8ba35f09097b0d53 (patch)
tree6a9690b485b84280cb75a149f5e802256099f7ae /include/linux/usb/chipidea.h
parent3ecb3e09b042e70799ff3a1ff464a5ecaa7547d9 (diff)
usb: chipidea: Add support for 'phy-clkgate-delay-us' property
Add support for the optional 'phy-clkgate-delay-us' property that is used to describe the delay time between putting PHY into low power mode and turning off the PHY clock. Signed-off-by: Li Jun <jun.li@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Peter Chen <peter.chen@freescale.com>
Diffstat (limited to 'include/linux/usb/chipidea.h')
-rw-r--r--include/linux/usb/chipidea.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
index c5cddc6901d0..5dd75fa47dd8 100644
--- a/include/linux/usb/chipidea.h
+++ b/include/linux/usb/chipidea.h
@@ -71,6 +71,7 @@ struct ci_hdrc_platform_data {
/* VBUS and ID signal state tracking, using extcon framework */
struct ci_hdrc_cable vbus_extcon;
struct ci_hdrc_cable id_extcon;
+ u32 phy_clkgate_delay_us;
};
/* Default offset of capability registers */