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authorYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>2011-07-08 14:51:27 +0900
committerFelipe Balbi <balbi@ti.com>2011-07-08 12:47:42 +0300
commit5154e9f126c1d2ee8f5f93d9954f83d82b2d5e64 (patch)
tree337df747ff50d9d154509882b704e2ad3ea07d7f /include/linux/usb/r8a66597.h
parentdeafeb24e8a846da8555e68f4bcf651daa8a4ed1 (diff)
usb: gadget: r8a66597-udc: Make BUSWAIT configurable through platform data
BUSWAIT is a 4-bit-wide value that controls the number of access waits from the CPU to on-chip USB module. b'0000 inserts 0 wait (2 access cycles) and b'1111 inserts 15 waits (17 access cycles, hardware initial value), respectively. BUSWAIT value depends on peripheral clock frequency supplied to on-chip of each CPU, hence should be configurable through platform data. Note that this patch assumes that b'0000 (0 wait, 2 access cycles) is rerely used and considered as invalid. If valid 'buswait' data is not provided by platform, initial b'1111 (15 waits, 17 access cycles) will be applied as a safe default. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'include/linux/usb/r8a66597.h')
-rw-r--r--include/linux/usb/r8a66597.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/usb/r8a66597.h b/include/linux/usb/r8a66597.h
index 26d216734057..6e1bfaedb6ca 100644
--- a/include/linux/usb/r8a66597.h
+++ b/include/linux/usb/r8a66597.h
@@ -31,6 +31,9 @@ struct r8a66597_platdata {
/* This callback can control port power instead of DVSTCTR register. */
void (*port_power)(int port, int power);
+ /* This parameter is for BUSWAIT */
+ u16 buswait;
+
/* set one = on chip controller, set zero = external controller */
unsigned on_chip:1;