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authorSakari Ailus <sakari.ailus@iki.fi>2015-02-25 14:39:11 -0500
committerMauro Carvalho Chehab <mchehab@s-opensource.com>2017-07-19 15:34:59 -0400
commit97bbdf02d905a0a48cb3c953ea352d7f4994643c (patch)
tree26db56922fdc77e5991f976e574354cb97e34bc1 /include/media/v4l2-fwnode.h
parente07a41f985898b9dae97c99bbb5d3d415b9ecd6c (diff)
media: v4l: Add support for CSI-1 and CCP2 busses
CCP2 and CSI-1, are older single data lane serial busses. [mchehab@s-opensource.com: don't use spaces for identation] Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Diffstat (limited to 'include/media/v4l2-fwnode.h')
-rw-r--r--include/media/v4l2-fwnode.h19
1 files changed, 19 insertions, 0 deletions
diff --git a/include/media/v4l2-fwnode.h b/include/media/v4l2-fwnode.h
index ecc1233a873e..29ae22bbbbaf 100644
--- a/include/media/v4l2-fwnode.h
+++ b/include/media/v4l2-fwnode.h
@@ -56,6 +56,24 @@ struct v4l2_fwnode_bus_parallel {
};
/**
+ * struct v4l2_fwnode_bus_mipi_csi1 - CSI-1/CCP2 data bus structure
+ * @clock_inv: polarity of clock/strobe signal
+ * false - not inverted, true - inverted
+ * @strobe: false - data/clock, true - data/strobe
+ * @lane_polarity: the polarities of the clock (index 0) and data lanes
+ index (1)
+ * @data_lane: the number of the data lane
+ * @clock_lane: the number of the clock lane
+ */
+struct v4l2_fwnode_bus_mipi_csi1 {
+ bool clock_inv;
+ bool strobe;
+ bool lane_polarity[2];
+ unsigned char data_lane;
+ unsigned char clock_lane;
+};
+
+/**
* struct v4l2_fwnode_endpoint - the endpoint data structure
* @base: fwnode endpoint of the v4l2_fwnode
* @bus_type: bus type
@@ -72,6 +90,7 @@ struct v4l2_fwnode_endpoint {
enum v4l2_mbus_type bus_type;
union {
struct v4l2_fwnode_bus_parallel parallel;
+ struct v4l2_fwnode_bus_mipi_csi1 mipi_csi1;
struct v4l2_fwnode_bus_mipi_csi2 mipi_csi2;
} bus;
u64 *link_frequencies;