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authorOswald Buddenhagen <oswald.buddenhagen@gmx.de>2023-05-10 19:39:08 +0200
committerTakashi Iwai <tiwai@suse.de>2023-05-12 09:17:18 +0200
commitf549466b8b8519260e49460543dff9b37f280cc9 (patch)
tree3aff31013ea5b2404438863267774a821df49c85 /include/sound/emu10k1.h
parent4c7bfbcf7516b0804ba0204e865f885baca604e4 (diff)
ALSA: emu10k1: apply channel delay hack to all E-MU cards
Evidently, the channel delay bug exists in all E-MU cards; it's in the Hana FPGA program, and was never fixed. Note that the implementation is somewhat lazy - to localize the code paths, we actually waste a GPR and a DSP instruction by keeping two delay registers for the same physical source. Signed-off-by: Oswald Buddenhagen <oswald.buddenhagen@gmx.de> Link: https://lore.kernel.org/r/20230510173917.3073107-6-oswald.buddenhagen@gmx.de Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'include/sound/emu10k1.h')
-rw-r--r--include/sound/emu10k1.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/sound/emu10k1.h b/include/sound/emu10k1.h
index 8fe80dcee71b..7129b9249eb3 100644
--- a/include/sound/emu10k1.h
+++ b/include/sound/emu10k1.h
@@ -1192,6 +1192,7 @@
* emumixer.c - snd_emu1010_output_enum_ctls[], snd_emu1010_input_enum_ctls[]
*/
#define EMU_DST_ALICE2_EMU32_0 0x000f /* 16 EMU32 channels to Alice2 +0 to +0xf */
+ /* This channel is delayed by one sample. */
#define EMU_DST_ALICE2_EMU32_1 0x0000 /* 16 EMU32 channels to Alice2 +0 to +0xf */
#define EMU_DST_ALICE2_EMU32_2 0x0001 /* 16 EMU32 channels to Alice2 +0 to +0xf */
#define EMU_DST_ALICE2_EMU32_3 0x0002 /* 16 EMU32 channels to Alice2 +0 to +0xf */