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authorCezary Rojewski <cezary.rojewski@intel.com>2024-02-20 12:50:34 +0100
committerMark Brown <broonie@kernel.org>2024-02-20 13:20:00 +0000
commit36478a74c7ddaf58d80da5cef9c5ddb5beed5a2e (patch)
tree6d2c7219e46efda468030a610a2b27172b518fab /include/sound
parent5acb19ecd1982bd1578912473b33df75a23fefc2 (diff)
ASoC: Intel: avs: ICCMAX recommendations for ICL+ platforms
For ICL+ platforms to avoid DMI/OPIO L1 entry during the base firmware load procedure, HW recommends to set LTRP_GB to 95us and start an additional CAPTURE stream in the background. Once the load completes, original LTRP_GB value is restored and the additional stream is released. Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://msgid.link/r/20240220115035.770402-10-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'include/sound')
-rw-r--r--include/sound/hda_register.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/sound/hda_register.h b/include/sound/hda_register.h
index 55958711d697..5ff31e6d41c1 100644
--- a/include/sound/hda_register.h
+++ b/include/sound/hda_register.h
@@ -131,6 +131,8 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
#define AZX_REG_VS_SDXEFIFOS_XBASE 0x1094
#define AZX_REG_VS_SDXEFIFOS_XINTERVAL 0x20
+#define AZX_REG_VS_LTRP_GB_MASK GENMASK(6, 0)
+
/* PCI space */
#define AZX_PCIREG_TCSEL 0x44