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authorTony Lindgren <tony@atomide.com>2015-05-20 09:01:20 -0700
committerTony Lindgren <tony@atomide.com>2015-05-20 09:01:20 -0700
commit928f81aa619d845d6faa5a459cdbc18b7a78ddce (patch)
tree14f5456843c82c786cc79fb248b002a22b2766e6 /include/uapi/linux/serial_reg.h
parent030bbdbf4c833bc69f502eae58498bc5572db736 (diff)
ARM: OMAP1: Move UART defines to prepare for sparse IRQ
These have been indirectly included via asm/irqs.h that has included mach/hardware.h unless SPARSE_IRQ is specified. Let's move them to where the other OMAP serial defines for 8250 are. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'include/uapi/linux/serial_reg.h')
-rw-r--r--include/uapi/linux/serial_reg.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h
index e9b4cb0cd7ed..1e5ac4e776da 100644
--- a/include/uapi/linux/serial_reg.h
+++ b/include/uapi/linux/serial_reg.h
@@ -331,6 +331,9 @@
* Extra serial register definitions for the internal UARTs
* in TI OMAP processors.
*/
+#define OMAP1_UART1_BASE 0xfffb0000
+#define OMAP1_UART2_BASE 0xfffb0800
+#define OMAP1_UART3_BASE 0xfffb9800
#define UART_OMAP_MDR1 0x08 /* Mode definition register */
#define UART_OMAP_MDR2 0x09 /* Mode definition register 2 */
#define UART_OMAP_SCR 0x10 /* Supplementary control register */