diff options
author | Olof Johansson <olof@lixom.net> | 2014-01-02 10:35:25 -0800 |
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committer | Olof Johansson <olof@lixom.net> | 2014-01-02 10:35:25 -0800 |
commit | c655479ab89cfad17a773cb55b57199c19f65e9b (patch) | |
tree | e2219efc6293053fe89e42ceaf248bcbb9744cab /include | |
parent | 63df151aa1037e4f4e71ec009a3b233ee2cc1dea (diff) | |
parent | d85bcfa916ffdf078f188aeab60f738b290f4309 (diff) |
Merge tag 'renesas-soc3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Third Round of Renesas ARM Based SoC Updates for v3.14
* Global
- Don't set plat_sci_port scbrr_algo_id field
- Declare SCIF register base and IRQ as resources
- Don't define SCIF platform data in an array
- Use macros to declare SCIF devices
* r7s72100 SoC (RZ/A1H)
- Add i2c clocks
* r8a7778 (R-Car M1)
- Add sound SCU clock support
* tag 'renesas-soc3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (43 commits)
arm: shmobile: r7s72100: add i2c clocks
ARM: shmobile: r8a7791: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7779: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7790: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7740: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a73a4: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7778: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r7s72100: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: sh73a0: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7790: Declare SCIF register base and IRQ as resources
ARM: shmobile: r8a7791: Declare SCIF register base and IRQ as resources
ARM: shmobile: r8a7778: Declare SCIF register base and IRQ as resources
ARM: shmobile: sh7372: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7779: Declare SCIF register base and IRQ as resources
ARM: shmobile: r8a7740: Declare SCIF register base and IRQ as resources
ARM: shmobile: r8a73a4: Declare SCIF register base and IRQ as resources
ARM: shmobile: r7s72100: Declare SCIF register base and IRQ as resources
ARM: shmobile: sh73a0: Declare SCIF register base and IRQ as resources
ARM: shmobile: sh7372: Declare SCIF register base and IRQ as resources
ARM: shmobile: r8a7790: Don't define SCIF platform data in an array
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/serial_sci.h | 34 |
1 files changed, 10 insertions, 24 deletions
diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h index 50fe651da965..af414e1895a5 100644 --- a/include/linux/serial_sci.h +++ b/include/linux/serial_sci.h @@ -11,11 +11,11 @@ #define SCIx_NOT_SUPPORTED (-1) enum { - SCBRR_ALGO_1, /* ((clk + 16 * bps) / (16 * bps) - 1) */ - SCBRR_ALGO_2, /* ((clk + 16 * bps) / (32 * bps) - 1) */ - SCBRR_ALGO_3, /* (((clk * 2) + 16 * bps) / (16 * bps) - 1) */ - SCBRR_ALGO_4, /* (((clk * 2) + 16 * bps) / (32 * bps) - 1) */ - SCBRR_ALGO_5, /* (((clk * 1000 / 32) / bps) - 1) */ + SCBRR_ALGO_NONE, /* Compute sampling rate in the driver */ + SCBRR_ALGO_1, /* clk / (16 * bps) */ + SCBRR_ALGO_2, /* DIV_ROUND_CLOSEST(clk, 32 * bps) - 1 */ + SCBRR_ALGO_3, /* clk / (8 * bps) */ + SCBRR_ALGO_4, /* DIV_ROUND_CLOSEST(clk, 16 * bps) - 1 */ SCBRR_ALGO_6, /* HSCIF variable sample rate algorithm */ }; @@ -70,17 +70,6 @@ enum { SCIx_MUX_IRQ = SCIx_NR_IRQS, /* special case */ }; -/* Offsets into the sci_port->gpios array */ -enum { - SCIx_SCK, - SCIx_RXD, - SCIx_TXD, - SCIx_CTS, - SCIx_RTS, - - SCIx_NR_FNS, -}; - enum { SCIx_PROBE_REGTYPE, @@ -108,10 +97,10 @@ enum { } #define SCIx_IRQ_IS_MUXED(port) \ - ((port)->cfg->irqs[SCIx_ERI_IRQ] == \ - (port)->cfg->irqs[SCIx_RXI_IRQ]) || \ - ((port)->cfg->irqs[SCIx_ERI_IRQ] && \ - !(port)->cfg->irqs[SCIx_RXI_IRQ]) + ((port)->irqs[SCIx_ERI_IRQ] == \ + (port)->irqs[SCIx_RXI_IRQ]) || \ + ((port)->irqs[SCIx_ERI_IRQ] && \ + ((port)->irqs[SCIx_RXI_IRQ] < 0)) /* * SCI register subset common for all port types. * Not all registers will exist on all parts. @@ -142,20 +131,17 @@ struct plat_sci_port_ops { struct plat_sci_port { unsigned long mapbase; /* resource base */ unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */ - unsigned int gpios[SCIx_NR_FNS]; /* SCK, RXD, TXD, CTS, RTS */ unsigned int type; /* SCI / SCIF / IRDA / HSCIF */ upf_t flags; /* UPF_* flags */ unsigned long capabilities; /* Port features/capabilities */ + unsigned int sampling_rate; unsigned int scbrr_algo_id; /* SCBRR calculation algo */ unsigned int scscr; /* SCSCR initialization */ /* * Platform overrides if necessary, defaults otherwise. */ - int overrun_bit; - unsigned int error_mask; - int port_reg; unsigned char regshift; unsigned char regtype; |