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authorEli Cohen <eli@mellanox.com>2016-06-22 17:27:26 +0300
committerDoug Ledford <dledford@redhat.com>2016-06-23 10:03:57 -0400
commitc9b254955b9f8814966f5dabd34c39d0e0a2b437 (patch)
treee9047224895572e01a408f9d5aaa2c1de32df4b5 /include
parentb57141c1abe41e26c09b1b1b7ece463464ba6de2 (diff)
IB/mlx5: Fix post send fence logic
If the caller specified IB_SEND_FENCE in the send flags of the work request and no previous work request stated that the successive one should be fenced, the work request would be executed without a fence. This could result in RDMA read or atomic operations failure due to a MR being invalidated. Fix this by adding the mlx5 enumeration for fencing RDMA/atomic operations and fix the logic to apply this. Fixes: e126ba97dba9 ('mlx5: Add driver for Mellanox Connect-IB adapters') Signed-off-by: Eli Cohen <eli@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Doug Ledford <dledford@redhat.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mlx5/qp.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/mlx5/qp.h b/include/linux/mlx5/qp.h
index e4e29882fdfd..630f66a186b7 100644
--- a/include/linux/mlx5/qp.h
+++ b/include/linux/mlx5/qp.h
@@ -172,6 +172,7 @@ enum {
enum {
MLX5_FENCE_MODE_NONE = 0 << 5,
MLX5_FENCE_MODE_INITIATOR_SMALL = 1 << 5,
+ MLX5_FENCE_MODE_FENCE = 2 << 5,
MLX5_FENCE_MODE_STRONG_ORDERING = 3 << 5,
MLX5_FENCE_MODE_SMALL_AND_FENCE = 4 << 5,
};