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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-25 16:19:32 -0700
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-25 16:19:32 -0700
commitab2fd30b668b1687a9ca9e9ea0b60145deeafe84 (patch)
treeeba2812d94c3a6add143b7ee182e4411a9f3d994 /include
parent25ee7e3832951cf5896b194f6cd929a44863f419 (diff)
parent2fac6f3fec2303649e9cd572255776cb93d3f888 (diff)
Automated merge of kernel.org:/home/rmk/linux-2.6-rmk.git
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-s3c2410/regs-iis.h10
-rw-r--r--include/asm-arm/arch-s3c2410/regs-mem.h8
-rw-r--r--include/asm-arm/arch-s3c2410/regs-spi.h2
-rw-r--r--include/asm-arm/arch-s3c2410/uncompress.h6
-rw-r--r--include/asm-arm/string.h17
5 files changed, 37 insertions, 6 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-iis.h b/include/asm-arm/arch-s3c2410/regs-iis.h
index 7ae8e1f45bc1..385b07d510da 100644
--- a/include/asm-arm/arch-s3c2410/regs-iis.h
+++ b/include/asm-arm/arch-s3c2410/regs-iis.h
@@ -14,6 +14,7 @@
* 26-06-2003 BJD Finished off definitions for register addresses
* 12-03-2004 BJD Updated include protection
* 07-03-2005 BJD Added FIFO size flags and S3C2440 MPLL
+ * 05-04-2005 LCVR Added IISFCON definitions for the S3C2400
*/
#ifndef __ASM_ARCH_REGS_IIS_H
@@ -68,5 +69,14 @@
#define S3C2410_IISFCON_RXMASK (0x3f)
#define S3C2410_IISFCON_RXSHIFT (0)
+#define S3C2400_IISFCON_TXDMA (1<<11)
+#define S3C2400_IISFCON_RXDMA (1<<10)
+#define S3C2400_IISFCON_TXENABLE (1<<9)
+#define S3C2400_IISFCON_RXENABLE (1<<8)
+#define S3C2400_IISFCON_TXMASK (0x07 << 4)
+#define S3C2400_IISFCON_TXSHIFT (4)
+#define S3C2400_IISFCON_RXMASK (0x07)
+#define S3C2400_IISFCON_RXSHIFT (0)
+
#define S3C2410_IISFIFO (0x10)
#endif /* __ASM_ARCH_REGS_IIS_H */
diff --git a/include/asm-arm/arch-s3c2410/regs-mem.h b/include/asm-arm/arch-s3c2410/regs-mem.h
index 1a1328ac0d79..a2d7d0cec042 100644
--- a/include/asm-arm/arch-s3c2410/regs-mem.h
+++ b/include/asm-arm/arch-s3c2410/regs-mem.h
@@ -12,6 +12,7 @@
* Changelog:
* 29-Sep-2004 BJD Initial include for Linux
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
+ * 04-Apr-2005 LCVR Added S3C2400 DRAM/BANKSIZE_MASK definitions
*
*/
@@ -183,6 +184,12 @@
#define S3C2410_REFRESH_TRP_3clk (1<<20)
#define S3C2410_REFRESH_TRP_4clk (2<<20)
+#define S3C2400_REFRESH_DRAM_TRP_MASK (3<<20)
+#define S3C2400_REFRESH_DRAM_TRP_1_5clk (0<<20)
+#define S3C2400_REFRESH_DRAM_TRP_2_5clk (1<<20)
+#define S3C2400_REFRESH_DRAM_TRP_3_5clk (2<<20)
+#define S3C2400_REFRESH_DRAM_TRP_4_5clk (3<<20)
+
#define S3C2410_REFRESH_TSRC_MASK (3<<18)
#define S3C2410_REFRESH_TSRC_4clk (0<<18)
#define S3C2410_REFRESH_TSRC_5clk (1<<18)
@@ -205,6 +212,7 @@
#define S3C2410_BANKSIZE_4M (0x5 << 0)
#define S3C2410_BANKSIZE_2M (0x4 << 0)
#define S3C2410_BANKSIZE_MASK (0x7 << 0)
+#define S3C2400_BANKSIZE_MASK (0x4 << 0)
#define S3C2410_BANKSIZE_SCLK_EN (1<<4)
#define S3C2410_BANKSIZE_SCKE_EN (1<<5)
#define S3C2410_BANKSIZE_BURST (1<<7)
diff --git a/include/asm-arm/arch-s3c2410/regs-spi.h b/include/asm-arm/arch-s3c2410/regs-spi.h
index cb502a88158b..338217858c73 100644
--- a/include/asm-arm/arch-s3c2410/regs-spi.h
+++ b/include/asm-arm/arch-s3c2410/regs-spi.h
@@ -12,6 +12,7 @@
* 20-04-2004 KF Created file
* 04-10-2004 BJD Removed VA address (no longer mapped)
* tidied file for submission
+ * 03-04-2005 LCVR Added S3C2400_SPPIN_nCS definition
*/
#ifndef __ASM_ARCH_REGS_SPI_H
@@ -46,6 +47,7 @@
#define S3C2410_SPPIN_ENMUL (1<<2) /* Multi Master Error detect */
#define S3C2410_SPPIN_RESERVED (1<<1)
+#define S3C2400_SPPIN_nCS (1<<1) /* SPI Card Select */
#define S3C2410_SPPIN_KEEP (1<<0) /* Master Out keep */
diff --git a/include/asm-arm/arch-s3c2410/uncompress.h b/include/asm-arm/arch-s3c2410/uncompress.h
index ad4252e27799..d7a4a8354fa9 100644
--- a/include/asm-arm/arch-s3c2410/uncompress.h
+++ b/include/asm-arm/arch-s3c2410/uncompress.h
@@ -16,6 +16,7 @@
* 12-Oct-2004 BJD Take account of debug uart configuration
* 15-Nov-2004 BJD Fixed uart configuration
* 22-Feb-2005 BJD Added watchdog to uncompress
+ * 04-Apr-2005 LCVR Added support to S3C2400 (no cpuid at GSTATUS1)
*/
#ifndef __ASM_ARCH_UNCOMPRESS_H
@@ -69,9 +70,12 @@ uart_rd(unsigned int reg)
static void
putc(char ch)
{
- int cpuid = *((volatile unsigned int *)S3C2410_GSTATUS1);
+ int cpuid = S3C2410_GSTATUS1_2410;
+#ifndef CONFIG_CPU_S3C2400
+ cpuid = *((volatile unsigned int *)S3C2410_GSTATUS1);
cpuid &= S3C2410_GSTATUS1_IDMASK;
+#endif
if (ch == '\n')
putc('\r'); /* expand newline to \r\n */
diff --git a/include/asm-arm/string.h b/include/asm-arm/string.h
index 2a8ab162412f..e50c4a39b699 100644
--- a/include/asm-arm/string.h
+++ b/include/asm-arm/string.h
@@ -29,15 +29,22 @@ extern void __memzero(void *ptr, __kernel_size_t n);
#define memset(p,v,n) \
({ \
- if ((n) != 0) { \
+ void *__p = (p); size_t __n = n; \
+ if ((__n) != 0) { \
if (__builtin_constant_p((v)) && (v) == 0) \
- __memzero((p),(n)); \
+ __memzero((__p),(__n)); \
else \
- memset((p),(v),(n)); \
+ memset((__p),(v),(__n)); \
} \
- (p); \
+ (__p); \
})
-#define memzero(p,n) ({ if ((n) != 0) __memzero((p),(n)); (p); })
+#define memzero(p,n) \
+ ({ \
+ void *__p = (p); size_t __n = n; \
+ if ((__n) != 0) \
+ __memzero((__p),(__n)); \
+ (__p); \
+ })
#endif