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authorAndy Fleming <afleming@freescale.com>2007-07-11 11:43:07 -0500
committerJeff Garzik <jeff@garzik.org>2007-07-18 18:29:37 -0400
commit7132ab7f6e0309bb8e0424e395ba149aee0c750e (patch)
treeb947434ef6edefdbe683b4a6c5740ccec977bc4e /include
parentaf2d940df2b60b15c271033d381c2f3ead655562 (diff)
Fix RGMII-ID handling in gianfar
The TSEC/eTSEC can detect the interface to the PHY automatically, but it isn't able to detect whether the RGMII connection needs internal delay. So we need to detect that change in the device tree, propagate it to the platform data, and then check it if we're in RGMII. This fixes a bug on the 8641D HPCN board where the Vitesse PHY doesn't use the delay for RGMII. Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/fsl_devices.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 695741b0e420..1831b196c70a 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -53,6 +53,7 @@ struct gianfar_platform_data {
u32 bus_id;
u32 phy_id;
u8 mac_addr[6];
+ phy_interface_t interface;
};
struct gianfar_mdio_data {