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authorAndrea Righi <arighi@nvidia.com>2024-12-28 11:04:11 +0100
committerTejun Heo <tj@kernel.org>2024-12-29 12:44:15 -1000
commit02f034dcbf3dcb0989e638fdc00d10984dc2278b (patch)
tree681514f7988f56f9df84a7b1ca8311b139cfea3b /kernel/sched
parent9cf9aceed21e3f08c94108bd688e812effce4423 (diff)
sched_ext: idle: clarify comments
Add a comments to clarify about the usage of cpumask_intersects(). Moreover, update scx_select_cpu_dfl() description clarifying that the final step of the idle selection logic involves searching for any idle CPU in the system that the task can use. Reviewed-by: Yury Norov <yury.norov@gmail.com> Signed-off-by: Andrea Righi <arighi@nvidia.com> Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'kernel/sched')
-rw-r--r--kernel/sched/ext.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/kernel/sched/ext.c b/kernel/sched/ext.c
index eec4716de225..2d701203a3db 100644
--- a/kernel/sched/ext.c
+++ b/kernel/sched/ext.c
@@ -3180,6 +3180,10 @@ static bool test_and_clear_cpu_idle(int cpu)
* scx_pick_idle_cpu() can get caught in an infinite loop as
* @cpu is never cleared from idle_masks.smt. Ensure that @cpu
* is eventually cleared.
+ *
+ * NOTE: Use cpumask_intersects() and cpumask_test_cpu() to
+ * reduce memory writes, which may help alleviate cache
+ * coherence pressure.
*/
if (cpumask_intersects(smt, idle_masks.smt))
cpumask_andnot(idle_masks.smt, idle_masks.smt, smt);
@@ -3408,6 +3412,8 @@ static void update_selcpu_topology(void)
* 4. Pick a CPU within the same NUMA node, if enabled:
* - choose a CPU from the same NUMA node to reduce memory access latency.
*
+ * 5. Pick any idle CPU usable by the task.
+ *
* Step 3 and 4 are performed only if the system has, respectively, multiple
* LLC domains / multiple NUMA nodes (see scx_selcpu_topo_llc and
* scx_selcpu_topo_numa).