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author | Fabio Estevam <festevam@gmail.com> | 2021-07-16 10:28:45 -0300 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2021-09-22 10:48:56 +0800 |
commit | c6fe862aa35c741b5b82cc5bda5f0c3cebf11bde (patch) | |
tree | 15c630d60fa9651f02a39054ba8a4ba1f28a48cc /lib/rhashtable.c | |
parent | bdd166bee8270534e42dc41793a43f3ec3b20dc9 (diff) |
arm64: dts: imx8mm-venice: Fix the SPI chipselect polarity
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:
[ 4.854337] m25p80@0 enforce active low on chipselect handle
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'lib/rhashtable.c')
0 files changed, 0 insertions, 0 deletions