diff options
| author | Rodrigo Vivi <rodrigo.vivi@gmail.com> | 2013-05-06 19:37:37 -0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-05-10 21:56:50 +0200 |
| commit | 285541647a816e00348916ba7387eeacea30eba9 (patch) | |
| tree | 7fbf02d900bb2865ac6f3230a16df557a708637a /mm/interval_tree.c | |
| parent | 891348b2bf08d8946e0621bec49802897b28c1c4 (diff) | |
drm/i915: HSW FBC WaFbcAsynchFlipDisableFbcQueue
Display register 420B0h bit 22 must be set to 1b for the entire time that
Frame Buffer Compression is enabled.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'mm/interval_tree.c')
0 files changed, 0 insertions, 0 deletions