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authorHayes Wang <hayeswang@realtek.com>2021-03-03 16:39:47 +0800
committerDavid S. Miller <davem@davemloft.net>2021-03-03 16:56:03 -0800
commit4b5dc1a94d4f92b5845e98bd9ae344b26d933aad (patch)
tree4d6cb8e1f57c4bc41ea7a8b38ad152f0466366cc /net/9p
parent3e59e8856758eb5a2dfe1f831ef53b168fd58105 (diff)
Revert "r8152: adjust the settings about MAC clock speed down for RTL8153"
This reverts commit 134f98bcf1b898fb9d6f2b91bc85dd2e5478b4b8. The r8153_mac_clk_spd() is used for RTL8153A only, because the register table of RTL8153B is different from RTL8153A. However, this function would be called when RTL8153B calls r8153_first_init() and r8153_enter_oob(). That causes RTL8153B becomes unstable when suspending and resuming. The worst case may let the device stop working. Besides, revert this commit to disable MAC clock speed down for RTL8153A. It would avoid the known issue when enabling U1. The data of the first control transfer may be wrong when exiting U1. Signed-off-by: Hayes Wang <hayeswang@realtek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net/9p')
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