diff options
| author | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2022-06-20 23:37:36 +0100 |
|---|---|---|
| committer | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2022-06-21 10:57:29 +0100 |
| commit | f58ffdfcae6816791088043793397d0a8876eaf0 (patch) | |
| tree | 4014ba5bf3e0a09a55a0793dd9c756dedce5cc2d /net | |
| parent | 5c17680ea9fcb1a7cf664279fe1bcf51934dcdaa (diff) | |
net: dsa: add support for setting default speed and interface
Add support for retrieving the interface mode from the DSA driver,
and derive the fastest speed from the MAC capabilities.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'net')
| -rw-r--r-- | net/dsa/port.c | 41 |
1 files changed, 36 insertions, 5 deletions
diff --git a/net/dsa/port.c b/net/dsa/port.c index bdccb613285d..a2ee78c9b37f 100644 --- a/net/dsa/port.c +++ b/net/dsa/port.c @@ -1484,12 +1484,11 @@ static const struct phylink_mac_ops dsa_port_phylink_mac_ops = { int dsa_port_phylink_create(struct dsa_port *dp) { struct dsa_switch *ds = dp->ds; - phy_interface_t mode; + phy_interface_t mode, default_mode; + int default_speed; int err; - err = of_get_phy_mode(dp->dn, &mode); - if (err) - mode = PHY_INTERFACE_MODE_NA; + default_mode = mode = PHY_INTERFACE_MODE_NA; /* Presence of phylink_mac_link_state or phylink_mac_an_restart is * an indicator of a legacy phylink driver. @@ -1499,7 +1498,15 @@ int dsa_port_phylink_create(struct dsa_port *dp) dp->pl_config.legacy_pre_march2020 = true; if (ds->ops->phylink_get_caps) - ds->ops->phylink_get_caps(ds, dp->index, &dp->pl_config); + ds->ops->phylink_get_caps(ds, dp->index, &dp->pl_config, + &mode); + + if (dp->type == DSA_PORT_TYPE_CPU || dp->type == DSA_PORT_TYPE_DSA) + default_mode = mode; + + err = of_get_phy_mode(dp->dn, &mode); + if (err) + mode = default_mode; dp->pl = phylink_create(&dp->pl_config, of_fwnode_handle(dp->dn), mode, &dsa_port_phylink_mac_ops); @@ -1508,6 +1515,30 @@ int dsa_port_phylink_create(struct dsa_port *dp) return PTR_ERR(dp->pl); } + if (dp->type == DSA_PORT_TYPE_CPU || dp->type == DSA_PORT_TYPE_DSA) { + unsigned long caps = dp->pl_config.mac_capabilities; + + if (!caps) + return 0; + + if (caps & MAC_10000FD) + default_speed = SPEED_10000; + else if (caps & MAC_5000FD) + default_speed = SPEED_5000; + else if (caps & MAC_2500FD) + default_speed = SPEED_2500; + else if (caps & MAC_1000) + default_speed = SPEED_1000; + else if (caps & MAC_100) + default_speed = SPEED_100; + else if (caps & MAC_10) + default_speed = SPEED_10; + else + default_speed = SPEED_UNKNOWN; + + phylink_set_fixed_link(dp->pl, default_speed, DUPLEX_FULL); + } + return 0; } |