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authorMichal Simek <michal.simek@xilinx.com>2016-01-13 19:37:25 +0100
committerMichal Simek <michal.simek@xilinx.com>2017-06-22 15:36:52 +0200
commita753499d43603d7b882cdd835aea9bc7183457fc (patch)
tree10fb2454da121a943580921b24a263464d86b4e3 /samples
parent83f0124ad81e87b74c2f461b1794e57ab5e7fea0 (diff)
microblaze: mm: Flush TLB to ensure correct mapping when higmem ON
MMU contains invalid mapping which wasn't flushed and new mapping is using the same addresses as previous one. That's why TLB miss is not happening to get new correct TLB entry and MMU points to incorrect area. This is replicatable when large files(256MB and more) are copied and checked. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'samples')
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