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authorShunyong Yang <shunyong.yang@hxt-semitech.com>2018-03-21 12:46:23 -0600
committerAlex Williamson <alex.williamson@redhat.com>2018-03-22 13:18:18 -0600
commitc9f89c3f87cfc026d88c08054710902dd52a7772 (patch)
treeaea02512b416b7d4495a14515cad8c42dd077498 /samples
parent6bd06f5a486c06023a618a86e8153b91d26f75f4 (diff)
vfio-mdev/samples: change RDI interrupt condition
When FIFO mode is enabled, the receive data available interrupt (UART_IIR_RDI in code) should be triggered when the number of data in FIFO is equal or larger than interrupt trigger level. This patch changes the trigger level check to ensure multiple bytes received from upper layer can trigger RDI interrupt correctly. Cc: Joey Zheng <yu.zheng@hxt-semitech.com> Signed-off-by: Shunyong Yang <shunyong.yang@hxt-semitech.com> Reviewed by: Kirti Wankhede <kwankhede@nvidia.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Diffstat (limited to 'samples')
-rw-r--r--samples/vfio-mdev/mtty.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/samples/vfio-mdev/mtty.c b/samples/vfio-mdev/mtty.c
index 09f255bdf3ac..7abb79d8313d 100644
--- a/samples/vfio-mdev/mtty.c
+++ b/samples/vfio-mdev/mtty.c
@@ -534,7 +534,7 @@ static void handle_bar_read(unsigned int index, struct mdev_state *mdev_state,
/* Interrupt priority 2: Fifo trigger level reached */
if ((ier & UART_IER_RDI) &&
- (mdev_state->s[index].rxtx.count ==
+ (mdev_state->s[index].rxtx.count >=
mdev_state->s[index].intr_trigger_level))
*buf |= UART_IIR_RDI;