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authorMasahiro Yamada <masahiroy@kernel.org>2020-05-22 10:59:58 +0900
committerMasahiro Yamada <masahiroy@kernel.org>2020-05-26 00:03:16 +0900
commite578edc72276280b8fae57f6bf79cb443ceee7a2 (patch)
tree646d0e6f9a333e413d35fbc63580c941097bf9dd /scripts/Makefile.build
parent9504bbe91efc163e4c46496ae790da60353b23b4 (diff)
kbuild: remove ifdef builtin-target / lib-target
I do not see a good reason to add ifdef here. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Diffstat (limited to 'scripts/Makefile.build')
-rw-r--r--scripts/Makefile.build10
1 files changed, 2 insertions, 8 deletions
diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index 3665b1a0bc8e..9af88f4cacb8 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -384,16 +384,14 @@ $(obj)/%/built-in.a: $(obj)/% ;
#
# Rule to compile a set of .o files into one .a file (without symbol table)
#
-ifdef builtin-target
quiet_cmd_ar_builtin = AR $@
cmd_ar_builtin = rm -f $@; $(AR) cDPrST $@ $(real-prereqs)
-$(builtin-target): $(real-obj-y) FORCE
+$(obj)/built-in.a: $(real-obj-y) FORCE
$(call if_changed,ar_builtin)
targets += $(builtin-target)
-endif # builtin-target
#
# Rule to create modules.order file
@@ -408,15 +406,11 @@ $(modorder-target): $(subdir-ym) FORCE
#
# Rule to compile a set of .o files into one .a file (with symbol table)
#
-ifdef lib-target
-
-$(lib-target): $(lib-y) FORCE
+$(obj)/lib.a: $(lib-y) FORCE
$(call if_changed,ar)
targets += $(lib-target)
-endif
-
# NOTE:
# Do not replace $(filter %.o,^) with $(real-prereqs). When a single object
# module is turned into a multi object module, $^ will contain header file