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| author | Sunil V L <sunilvl@ventanamicro.com> | 2023-04-05 15:40:12 +0200 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2023-04-06 20:29:11 +0200 |
| commit | f2ca92d08325b8d4668a6b3ee4b3d5622b75b952 (patch) | |
| tree | 9fd4b9e81cf5b138e321631fbd8a4c9c4c0f8296 /scripts/markup_oops.pl | |
| parent | 520d4a0ee5b6d9c7a1258ace6caa13a94ac35ef8 (diff) | |
ACPICA: MADT: Add RISC-V INTC interrupt controller
ACPICA commit bd6d1ae1e13abe78e149c8b61b4bc7bc7feab015
The ECR to add RISC-V INTC interrupt controller is approved by
the UEFI forum and will be available in the next revision of
the ACPI specification.
Link: https://github.com/acpica/acpica/commit/bd6d1ae1
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'scripts/markup_oops.pl')
0 files changed, 0 insertions, 0 deletions