diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-09-29 23:12:57 +0900 |
|---|---|---|
| committer | Boris Brezillon <boris.brezillon@free-electrons.com> | 2017-10-07 11:28:06 +0200 |
| commit | 7963f58cbf3a722c93f946c80a12f185b86dc45c (patch) | |
| tree | 0ccc6ea49a657c82c9bc6dc91e412b5b5a46f1f6 /scripts/sign-file.c | |
| parent | 263c68afb521b2ff1ca386d312d155ff3d22b69a (diff) | |
mtd: nand: denali: fix setup_data_interface to meet tCCS delay
The WE_2_RE register specifies the number of clock cycles inserted
between the rising edge of #WE and the falling edge of #RE.
The current setup_data_interface implementation takes care of tWHR,
but tCCS is missing. Wait for max(tCSS, tWHR) to meet the spec.
With setup_data_interface() properly programmed, the Denali NAND
controller can observe the timing, so NAND_WAIT_TCCS flag is unneeded.
Clarify this in the comment block.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Diffstat (limited to 'scripts/sign-file.c')
0 files changed, 0 insertions, 0 deletions