diff options
| author | Oswald Buddenhagen <oswald.buddenhagen@gmx.de> | 2023-04-21 16:10:01 +0200 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2023-04-22 10:42:08 +0200 |
| commit | a1c87c0b27059b4155c7aba6b34810c889e8b6a9 (patch) | |
| tree | c058ff028e8e1e82d4d8dfc59b75f9fdf17556d9 /sound/pci/emu10k1/io.c | |
| parent | 10f212bd7a693e379154891cc16959bc4884668a (diff) | |
ALSA: emu10k1: fix access to Audigy GPIO port
As the register definition clearly states, this is a 16-bit register,
yet we did all accesses as 32-bit. The writes in particular would have
the potential to clear the TIMER register (depending on how the bus/card
actually handles the too long writes).
This commit also introduces a separate define A_GPIO which aliases
A_IOCFG, which better reflects the distinct usage on E-MU cards.
This is done in the same commit to keep the churn down, as we're
touching all involved lines anyway.
Signed-off-by: Oswald Buddenhagen <oswald.buddenhagen@gmx.de>
Link: https://lore.kernel.org/r/20230421141006.1005539-2-oswald.buddenhagen@gmx.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci/emu10k1/io.c')
| -rw-r--r-- | sound/pci/emu10k1/io.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/sound/pci/emu10k1/io.c b/sound/pci/emu10k1/io.c index 35bc73d99d04..f0134689c320 100644 --- a/sound/pci/emu10k1/io.c +++ b/sound/pci/emu10k1/io.c @@ -243,13 +243,13 @@ void snd_emu1010_fpga_write(struct snd_emu10k1 *emu, u32 reg, u32 value) if (snd_BUG_ON(value > 0x3f)) /* 0 to 0x3f are values */ return; spin_lock_irqsave(&emu->emu_lock, flags); - outl(reg, emu->port + A_IOCFG); + outw(reg, emu->port + A_GPIO); udelay(10); - outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */ + outw(reg | 0x80, emu->port + A_GPIO); /* High bit clocks the value into the fpga. */ udelay(10); - outl(value, emu->port + A_IOCFG); + outw(value, emu->port + A_GPIO); udelay(10); - outl(value | 0x80 , emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */ + outw(value | 0x80 , emu->port + A_GPIO); /* High bit clocks the value into the fpga. */ spin_unlock_irqrestore(&emu->emu_lock, flags); } @@ -260,11 +260,11 @@ void snd_emu1010_fpga_read(struct snd_emu10k1 *emu, u32 reg, u32 *value) return; reg += 0x40; /* 0x40 upwards are registers. */ spin_lock_irqsave(&emu->emu_lock, flags); - outl(reg, emu->port + A_IOCFG); + outw(reg, emu->port + A_GPIO); udelay(10); - outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */ + outw(reg | 0x80, emu->port + A_GPIO); /* High bit clocks the value into the fpga. */ udelay(10); - *value = ((inl(emu->port + A_IOCFG) >> 8) & 0x7f); + *value = ((inw(emu->port + A_GPIO) >> 8) & 0x7f); spin_unlock_irqrestore(&emu->emu_lock, flags); } |