diff options
| author | V sujith kumar Reddy <Vsujithkumar.Reddy@amd.com> | 2022-07-07 21:41:41 +0530 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2022-07-08 18:53:14 +0100 |
| commit | b24484c18b1089f9dd1ef7901b05a85e315e9f41 (patch) | |
| tree | 9ec12c2971dd68ef16c7f7adc59fdb0df0a932c5 /sound/soc/amd/acp/chip_offset_byte.h | |
| parent | ac2606df8a3fb4450240cf0893ff3934b5882c69 (diff) | |
ASoC: amd: acp: ACP code generic to support newer platforms
ADD Generic code to support to newer platforms, add
control threshold, irq control macros ,added structure for register
offset differences.
Signed-off-by: V sujith kumar Reddy <Vsujithkumar.Reddy@amd.com>
Link: https://lore.kernel.org/r/20220707161142.491034-3-Vsujithkumar.Reddy@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/amd/acp/chip_offset_byte.h')
| -rw-r--r-- | sound/soc/amd/acp/chip_offset_byte.h | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/sound/soc/amd/acp/chip_offset_byte.h b/sound/soc/amd/acp/chip_offset_byte.h index 88f6fa597cd6..fff7e80475ba 100644 --- a/sound/soc/amd/acp/chip_offset_byte.h +++ b/sound/soc/amd/acp/chip_offset_byte.h @@ -20,11 +20,13 @@ #define ACP_SOFT_RESET 0x1000 #define ACP_CONTROL 0x1004 -#define ACP_EXTERNAL_INTR_ENB 0x1800 -#define ACP_EXTERNAL_INTR_CNTL 0x1804 -#define ACP_EXTERNAL_INTR_STAT 0x1808 -#define ACP_I2S_PIN_CONFIG 0x1400 -#define ACP_SCRATCH_REG_0 0x12800 +#define ACP_EXTERNAL_INTR_REG_ADDR(adata, offset, ctrl) \ + (adata->acp_base + adata->rsrc->irq_reg_offset + offset + (ctrl * 0x04)) + +#define ACP_EXTERNAL_INTR_ENB(adata) ACP_EXTERNAL_INTR_REG_ADDR(adata, 0x0, 0x0) +#define ACP_EXTERNAL_INTR_CNTL(adata, ctrl) ACP_EXTERNAL_INTR_REG_ADDR(adata, 0x4, ctrl) +#define ACP_EXTERNAL_INTR_STAT(adata, ctrl) ACP_EXTERNAL_INTR_REG_ADDR(adata, \ + (0x4 + (adata->rsrc->no_of_ctrls * 0x04)), ctrl) /* Registers from ACP_AUDIO_BUFFERS block */ |