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authorDaniel Baluta <daniel.baluta@nxp.com>2018-02-13 16:29:33 +0200
committerMark Brown <broonie@kernel.org>2018-02-16 12:15:28 +0000
commit920884777480739789bb94ce8aeab1bc1de30dc2 (patch)
tree9200e009f6c085ccfc0a98a91e2b04b062133921 /sound/soc/codecs/ak5558.h
parent7928b2cbe55b2a410a0f5c1f154610059c57b1b2 (diff)
ASoC: ak5558: Add support for AK5558 ADC driver
AK5558 is a 32-bit, 768 kHZ sampling, differential input ADC for digital audio systems. Datasheet is available at: https://www.akm.com/akm/en/file/datasheet/AK5558VN.pdf Initial patch includes support for normal and TDM modes. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Junichi Wakasugi <wakasugi.jb@om.asahi-kasei.co.jp> [initial coding for 3.18 kernel] Signed-off-by: Mihai Serban <mihai.serban@nxp.com> [cleanups and porting to 4.9 kernel] Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> [tdm support] Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> [pm support, cleanups and porting to latest kernel] Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/ak5558.h')
-rw-r--r--sound/soc/codecs/ak5558.h52
1 files changed, 52 insertions, 0 deletions
diff --git a/sound/soc/codecs/ak5558.h b/sound/soc/codecs/ak5558.h
new file mode 100644
index 000000000000..7c9e37374f39
--- /dev/null
+++ b/sound/soc/codecs/ak5558.h
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Audio driver header for AK5558
+ *
+ * Copyright (C) 2016 Asahi Kasei Microdevices Corporation
+ * Copyright 2018 NXP
+ */
+
+#ifndef _AK5558_H
+#define _AK5558_H
+
+#define AK5558_00_POWER_MANAGEMENT1 0x00
+#define AK5558_01_POWER_MANAGEMENT2 0x01
+#define AK5558_02_CONTROL1 0x02
+#define AK5558_03_CONTROL2 0x03
+#define AK5558_04_CONTROL3 0x04
+#define AK5558_05_DSD 0x05
+
+/* AK5558_02_CONTROL1 fields */
+#define AK5558_DIF GENMASK(1, 1)
+#define AK5558_DIF_MSB_MODE (0 << 1)
+#define AK5558_DIF_I2S_MODE (1 << 1)
+
+#define AK5558_BITS GENMASK(2, 2)
+#define AK5558_DIF_24BIT_MODE (0 << 2)
+#define AK5558_DIF_32BIT_MODE (1 << 2)
+
+#define AK5558_CKS GENMASK(6, 3)
+#define AK5558_CKS_128FS_192KHZ (0 << 3)
+#define AK5558_CKS_192FS_192KHZ (1 << 3)
+#define AK5558_CKS_256FS_48KHZ (2 << 3)
+#define AK5558_CKS_256FS_96KHZ (3 << 3)
+#define AK5558_CKS_384FS_96KHZ (4 << 3)
+#define AK5558_CKS_384FS_48KHZ (5 << 3)
+#define AK5558_CKS_512FS_48KHZ (6 << 3)
+#define AK5558_CKS_768FS_48KHZ (7 << 3)
+#define AK5558_CKS_64FS_384KHZ (8 << 3)
+#define AK5558_CKS_32FS_768KHZ (9 << 3)
+#define AK5558_CKS_96FS_384KHZ (10 << 3)
+#define AK5558_CKS_48FS_768KHZ (11 << 3)
+#define AK5558_CKS_64FS_768KHZ (12 << 3)
+#define AK5558_CKS_1024FS_16KHZ (13 << 3)
+#define AK5558_CKS_AUTO (15 << 3)
+
+/* AK5558_03_CONTROL2 fields */
+#define AK5558_MODE_BITS GENMASK(6, 5)
+#define AK5558_MODE_NORMAL (0 << 5)
+#define AK5558_MODE_TDM128 (1 << 5)
+#define AK5558_MODE_TDM256 (2 << 5)
+#define AK5558_MODE_TDM512 (3 << 5)
+
+#endif