diff options
| author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2015-06-04 16:04:17 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-06-04 17:50:02 +0100 |
| commit | 7de544fd3275a136b311bfce9fe4406a1518d488 (patch) | |
| tree | fb5022992d5e06fed3cffac6066440d66e6a2c3f /sound/soc/codecs/tas2552.h | |
| parent | 89683fdefdd74828145b9d18333761cc975143f8 (diff) | |
ASoC: tas2552: Correct CFG1 register bit definitions
Remove the _MASK postfix of the bit definitions, collect the CFG1 bit
definition in one place and correct the bit shifts at the same time.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/tas2552.h')
| -rw-r--r-- | sound/soc/codecs/tas2552.h | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/sound/soc/codecs/tas2552.h b/sound/soc/codecs/tas2552.h index 938d90f1cab9..0725befb4c41 100644 --- a/sound/soc/codecs/tas2552.h +++ b/sound/soc/codecs/tas2552.h @@ -45,10 +45,14 @@ #define TAS2552_MAX_REG 0x20 /* CFG1 Register Masks */ -#define TAS2552_MUTE_MASK (1 << 2) -#define TAS2552_SWS_MASK (1 << 1) -#define TAS2552_WCLK_MASK 0x07 -#define TAS2552_CLASSD_EN_MASK (1 << 7) +#define TAS2552_DEV_RESET (1 << 0) +#define TAS2552_SWS (1 << 1) +#define TAS2552_MUTE (1 << 2) +#define TAS2552_PLL_SRC_MCLK (0x0 << 4) +#define TAS2552_PLL_SRC_BCLK (0x1 << 4) +#define TAS2552_PLL_SRC_IVCLKIN (0x2 << 4) +#define TAS2552_PLL_SRC_1_8_FIXED (0x3 << 4) +#define TAS2552_PLL_SRC_MASK TAS2552_PLL_SRC_1_8_FIXED /* CFG2 Register Masks */ #define TAS2552_CLASSD_EN (1 << 7) @@ -68,11 +72,6 @@ #define TAS2552_DAIFMT_RIGHT_J (1 << 4) #define TAS2552_DAIFMT_LEFT_J (0x11 << 3) -#define TAS2552_PLL_SRC_MCLK 0x00 -#define TAS2552_PLL_SRC_BCLK (1 << 3) -#define TAS2552_PLL_SRC_IVCLKIN (1 << 4) -#define TAS2552_PLL_SRC_1_8_FIXED (0x11 << 3) - #define TAS2552_DIN_SRC_SEL_MUTED 0x00 #define TAS2552_DIN_SRC_SEL_LEFT (1 << 4) #define TAS2552_DIN_SRC_SEL_RIGHT (1 << 5) |