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authorCharles Keepax <ckeepax@opensource.wolfsonmicro.com>2016-08-11 14:42:55 +0100
committerMark Brown <broonie@kernel.org>2016-08-11 15:01:28 +0100
commit19c891924b764fe192d0ad57b7dc676316a85250 (patch)
treee6d1c6fda1c110ac47a83ccdea338e53a102f65c /sound/soc/codecs/wm5110.c
parent29b4817d4018df78086157ea3a55c1d9424a7cfc (diff)
ASoC: arizona: Connect ASRCs to both clock domains
The two clock domains are enabled based on each input and output of the chip being connected to its respective clock domain. The ASRC however can bridge the two domains and as such can function as an input/output to either domain. The hardware also requires that both clocks are enabled before the ASRC is. Ensure these constraints by linking the ASRCs to both SYSCLK and ASYNCCLK. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/wm5110.c')
-rw-r--r--sound/soc/codecs/wm5110.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c
index 156547026a40..673dc598c234 100644
--- a/sound/soc/codecs/wm5110.c
+++ b/sound/soc/codecs/wm5110.c
@@ -1745,6 +1745,16 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = {
{ "IN4L", NULL, "SYSCLK" },
{ "IN4R", NULL, "SYSCLK" },
+ { "ASRC1L", NULL, "SYSCLK" },
+ { "ASRC1R", NULL, "SYSCLK" },
+ { "ASRC2L", NULL, "SYSCLK" },
+ { "ASRC2R", NULL, "SYSCLK" },
+
+ { "ASRC1L", NULL, "ASYNCCLK" },
+ { "ASRC1R", NULL, "ASYNCCLK" },
+ { "ASRC2L", NULL, "ASYNCCLK" },
+ { "ASRC2R", NULL, "ASYNCCLK" },
+
{ "MICBIAS1", NULL, "MICVDD" },
{ "MICBIAS2", NULL, "MICVDD" },
{ "MICBIAS3", NULL, "MICVDD" },