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| author | Takashi Iwai <tiwai@suse.de> | 2014-12-08 15:04:02 +0100 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2014-12-08 15:04:02 +0100 |
| commit | e5edba464c11d9d42550f9e3ff97f25196ba50b2 (patch) | |
| tree | 269a640ff93c68db724080f73b0e267e024af082 /sound/soc/davinci/davinci-mcasp.h | |
| parent | 77de61c3975da6f2200935c341e84018ece6ce36 (diff) | |
| parent | 1810afd3e1ded09c53d4e966dddce3c7d484521f (diff) | |
Merge tag 'asoc-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Updates for v3.19
Lots and lots of changes this time around, the usual set of driver
updates and a huge bulk of cleanups from Lars-Peter. Probably the most
interesting thing for most users is the Intel driver updates which will
(with some more machine integration work) enable support for newer x86
laptops.
- Conversion of AC'97 drivers to use regmap, bringing us closer to the
removal of the ASoC level I/O code.
- Clean up a lot of old drivers that were open coding things that have
subsequently been implemented in the core.
- Some DAPM performance improvements.
- Removal of the now seldom used CODEC mutex.
- Lots of updates for the newer Intel SoC support, including support
for the DSP and some Cherrytrail and Braswell machine drivers.
- Support for Samsung boards using rt5631 as the CODEC.
- Removal of the obsolete AFEB9260 machine driver.
- Driver support for the TI TS3A227E headset driver used in some
Chrombeooks.
Diffstat (limited to 'sound/soc/davinci/davinci-mcasp.h')
| -rw-r--r-- | sound/soc/davinci/davinci-mcasp.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/sound/soc/davinci/davinci-mcasp.h b/sound/soc/davinci/davinci-mcasp.h index 98fbc451892a..79dc511180bf 100644 --- a/sound/soc/davinci/davinci-mcasp.h +++ b/sound/soc/davinci/davinci-mcasp.h @@ -253,6 +253,13 @@ #define TXFSRST BIT(12) /* Frame Sync Generator Reset */ /* + * DAVINCI_MCASP_TXSTAT_REG - Transmitter Status Register Bits + * DAVINCI_MCASP_RXSTAT_REG - Receiver Status Register Bits + */ +#define XRERR BIT(8) /* Transmit/Receive error */ +#define XRDATA BIT(5) /* Transmit/Receive data ready */ + +/* * DAVINCI_MCASP_AMUTE_REG - Mute Control Register Bits */ #define MUTENA(val) (val) @@ -279,6 +286,16 @@ #define TXDATADMADIS BIT(0) /* + * DAVINCI_MCASP_EVTCTLR_REG - Receiver Interrupt Control Register Bits + */ +#define ROVRN BIT(0) + +/* + * DAVINCI_MCASP_EVTCTLX_REG - Transmitter Interrupt Control Register Bits + */ +#define XUNDRN BIT(0) + +/* * DAVINCI_MCASP_W[R]FIFOCTL - Write/Read FIFO Control Register bits */ #define FIFO_ENABLE BIT(16) |