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authorZubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>2015-02-03 10:55:57 +0000
committerMark Brown <broonie@kernel.org>2015-02-04 21:12:39 +0000
commit26b0aad80a86d39b8c3a3189fbaf477ef92a64ff (patch)
treedb202135d3217371f5e39aad020af2a82337e8e2 /sound/soc/jz4740
parent97bf6af1f928216fd6c5a66e8a57bfa95a659672 (diff)
ASoC: jz4740: Add dynamic sampling rate support to jz4740-i2s
The div clock register is not modified during jz4740_i2s_hw_params. Hence, default sampling rates are actually used regardless of sampling rates input from userspace. This patch adds support to calculate the value of the divider from the parameters passed from userspace and update the relevant div registers Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/jz4740')
-rw-r--r--sound/soc/jz4740/jz4740-i2s.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c
index d3d45c6f064f..b7a7e8295d3c 100644
--- a/sound/soc/jz4740/jz4740-i2s.c
+++ b/sound/soc/jz4740/jz4740-i2s.c
@@ -83,6 +83,8 @@
#define JZ_AIC_I2S_STATUS_BUSY BIT(2)
#define JZ_AIC_CLK_DIV_MASK 0xf
+#define I2SDIV_DV_SHIFT 8
+#define I2SDIV_DV_MASK (0xf << I2SDIV_DV_SHIFT)
struct jz4740_i2s {
struct resource *mem;
@@ -237,10 +239,14 @@ static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream,
{
struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai);
unsigned int sample_size;
- uint32_t ctrl;
+ uint32_t ctrl, div_reg;
+ int div;
ctrl = jz4740_i2s_read(i2s, JZ_REG_AIC_CTRL);
+ div_reg = jz4740_i2s_read(i2s, JZ_REG_AIC_CLK_DIV);
+ div = clk_get_rate(i2s->clk_i2s) / (64 * params_rate(params));
+
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_S8:
sample_size = 0;
@@ -264,7 +270,10 @@ static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream,
ctrl |= sample_size << JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_OFFSET;
}
+ div_reg &= ~I2SDIV_DV_MASK;
+ div_reg |= (div - 1) << I2SDIV_DV_SHIFT;
jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
+ jz4740_i2s_write(i2s, JZ_REG_AIC_CLK_DIV, div_reg);
return 0;
}