diff options
author | Mark Brown <broonie@kernel.org> | 2021-08-25 10:50:21 +0100 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2021-08-25 10:50:21 +0100 |
commit | 88939e737573552310d9ef4caf74501f67306bfc (patch) | |
tree | 2b5499b3cb3c6e36934b469b1fd87565820a9a75 /sound/soc/mediatek/mt8195/mt8195-audsys-clkid.h | |
parent | 0be10d7122ceb8f322086283420a59ee89c1947f (diff) | |
parent | 5f8c991e8950971cd1f81b61f79c83a511ad9fc8 (diff) |
Merge series "ASoC: mediatek: Add support for MT8195 SoC" from Trevor Wu <trevor.wu@mediatek.com>:
This series of patches adds support for Mediatek AFE of MT8195 SoC.
Patches are based on broonie tree "for-next" branch.
Changes since v4:
- removed sof related code
Changes since v3:
- fixed warnings found by kernel test robot
- removed unused critical section
- corrected the lock protected sections on etdm driver
- added DPTX and HDMITX audio support
Changes since v2:
- added audio clock gate control
- added 'mediatek' prefix to private dts properties
- added consumed clocks to dt-bindins and adopted suggestions from Rob
- refined clock usage and remove unused clock and control code
- fixed typos
Changes since v1:
- fixed some problems related to dt-bindings
- added some missing properties to dt-bindings
- added depency declaration on dt-bindings
- fixed some warnings found by kernel test robot
Trevor Wu (11):
ASoC: mediatek: mt8195: update mediatek common driver
ASoC: mediatek: mt8195: support audsys clock control
ASoC: mediatek: mt8195: support etdm in platform driver
ASoC: mediatek: mt8195: support adda in platform driver
ASoC: mediatek: mt8195: support pcm in platform driver
ASoC: mediatek: mt8195: add platform driver
dt-bindings: mediatek: mt8195: add audio afe document
ASoC: mediatek: mt8195: add machine driver with mt6359, rt1019 and
rt5682
ASoC: mediatek: mt8195: add DPTX audio support
ASoC: mediatek: mt8195: add HDMITX audio support
dt-bindings: mediatek: mt8195: add mt8195-mt6359-rt1019-rt5682
document
.../bindings/sound/mt8195-afe-pcm.yaml | 184 +
.../sound/mt8195-mt6359-rt1019-rt5682.yaml | 47 +
sound/soc/mediatek/Kconfig | 24 +
sound/soc/mediatek/Makefile | 1 +
sound/soc/mediatek/common/mtk-afe-fe-dai.c | 22 +-
sound/soc/mediatek/common/mtk-base-afe.h | 10 +-
sound/soc/mediatek/mt8195/Makefile | 15 +
sound/soc/mediatek/mt8195/mt8195-afe-clk.c | 441 +++
sound/soc/mediatek/mt8195/mt8195-afe-clk.h | 109 +
sound/soc/mediatek/mt8195/mt8195-afe-common.h | 158 +
sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 3281 +++++++++++++++++
sound/soc/mediatek/mt8195/mt8195-audsys-clk.c | 214 ++
sound/soc/mediatek/mt8195/mt8195-audsys-clk.h | 15 +
.../soc/mediatek/mt8195/mt8195-audsys-clkid.h | 93 +
sound/soc/mediatek/mt8195/mt8195-dai-adda.c | 830 +++++
sound/soc/mediatek/mt8195/mt8195-dai-etdm.c | 2639 +++++++++++++
sound/soc/mediatek/mt8195/mt8195-dai-pcm.c | 389 ++
.../mt8195/mt8195-mt6359-rt1019-rt5682.c | 1087 ++++++
sound/soc/mediatek/mt8195/mt8195-reg.h | 2796 ++++++++++++++
19 files changed, 12350 insertions(+), 5 deletions(-)
create mode 100644 Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml
create mode 100644 Documentation/devicetree/bindings/sound/mt8195-mt6359-rt1019-rt5682.yaml
create mode 100644 sound/soc/mediatek/mt8195/Makefile
create mode 100644 sound/soc/mediatek/mt8195/mt8195-afe-clk.c
create mode 100644 sound/soc/mediatek/mt8195/mt8195-afe-clk.h
create mode 100644 sound/soc/mediatek/mt8195/mt8195-afe-common.h
create mode 100644 sound/soc/mediatek/mt8195/mt8195-afe-pcm.c
create mode 100644 sound/soc/mediatek/mt8195/mt8195-audsys-clk.c
create mode 100644 sound/soc/mediatek/mt8195/mt8195-audsys-clk.h
create mode 100644 sound/soc/mediatek/mt8195/mt8195-audsys-clkid.h
create mode 100644 sound/soc/mediatek/mt8195/mt8195-dai-adda.c
create mode 100644 sound/soc/mediatek/mt8195/mt8195-dai-etdm.c
create mode 100644 sound/soc/mediatek/mt8195/mt8195-dai-pcm.c
create mode 100644 sound/soc/mediatek/mt8195/mt8195-mt6359-rt1019-rt5682.c
create mode 100644 sound/soc/mediatek/mt8195/mt8195-reg.h
--
2.18.0
Diffstat (limited to 'sound/soc/mediatek/mt8195/mt8195-audsys-clkid.h')
-rw-r--r-- | sound/soc/mediatek/mt8195/mt8195-audsys-clkid.h | 93 |
1 files changed, 93 insertions, 0 deletions
diff --git a/sound/soc/mediatek/mt8195/mt8195-audsys-clkid.h b/sound/soc/mediatek/mt8195/mt8195-audsys-clkid.h new file mode 100644 index 000000000000..4dd0a5c8b8fa --- /dev/null +++ b/sound/soc/mediatek/mt8195/mt8195-audsys-clkid.h @@ -0,0 +1,93 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * mt8195-audsys-clkid.h -- Mediatek 8195 audsys clock id definition + * + * Copyright (c) 2021 MediaTek Inc. + * Author: Trevor Wu <trevor.wu@mediatek.com> + */ + +#ifndef _MT8195_AUDSYS_CLKID_H_ +#define _MT8195_AUDSYS_CLKID_H_ + +enum{ + CLK_AUD_AFE, + CLK_AUD_LRCK_CNT, + CLK_AUD_SPDIFIN_TUNER_APLL, + CLK_AUD_SPDIFIN_TUNER_DBG, + CLK_AUD_UL_TML, + CLK_AUD_APLL1_TUNER, + CLK_AUD_APLL2_TUNER, + CLK_AUD_TOP0_SPDF, + CLK_AUD_APLL, + CLK_AUD_APLL2, + CLK_AUD_DAC, + CLK_AUD_DAC_PREDIS, + CLK_AUD_TML, + CLK_AUD_ADC, + CLK_AUD_DAC_HIRES, + CLK_AUD_A1SYS_HP, + CLK_AUD_AFE_DMIC1, + CLK_AUD_AFE_DMIC2, + CLK_AUD_AFE_DMIC3, + CLK_AUD_AFE_DMIC4, + CLK_AUD_AFE_26M_DMIC_TM, + CLK_AUD_UL_TML_HIRES, + CLK_AUD_ADC_HIRES, + CLK_AUD_ADDA6_ADC, + CLK_AUD_ADDA6_ADC_HIRES, + CLK_AUD_LINEIN_TUNER, + CLK_AUD_EARC_TUNER, + CLK_AUD_I2SIN, + CLK_AUD_TDM_IN, + CLK_AUD_I2S_OUT, + CLK_AUD_TDM_OUT, + CLK_AUD_HDMI_OUT, + CLK_AUD_ASRC11, + CLK_AUD_ASRC12, + CLK_AUD_MULTI_IN, + CLK_AUD_INTDIR, + CLK_AUD_A1SYS, + CLK_AUD_A2SYS, + CLK_AUD_PCMIF, + CLK_AUD_A3SYS, + CLK_AUD_A4SYS, + CLK_AUD_MEMIF_UL1, + CLK_AUD_MEMIF_UL2, + CLK_AUD_MEMIF_UL3, + CLK_AUD_MEMIF_UL4, + CLK_AUD_MEMIF_UL5, + CLK_AUD_MEMIF_UL6, + CLK_AUD_MEMIF_UL8, + CLK_AUD_MEMIF_UL9, + CLK_AUD_MEMIF_UL10, + CLK_AUD_MEMIF_DL2, + CLK_AUD_MEMIF_DL3, + CLK_AUD_MEMIF_DL6, + CLK_AUD_MEMIF_DL7, + CLK_AUD_MEMIF_DL8, + CLK_AUD_MEMIF_DL10, + CLK_AUD_MEMIF_DL11, + CLK_AUD_GASRC0, + CLK_AUD_GASRC1, + CLK_AUD_GASRC2, + CLK_AUD_GASRC3, + CLK_AUD_GASRC4, + CLK_AUD_GASRC5, + CLK_AUD_GASRC6, + CLK_AUD_GASRC7, + CLK_AUD_GASRC8, + CLK_AUD_GASRC9, + CLK_AUD_GASRC10, + CLK_AUD_GASRC11, + CLK_AUD_GASRC12, + CLK_AUD_GASRC13, + CLK_AUD_GASRC14, + CLK_AUD_GASRC15, + CLK_AUD_GASRC16, + CLK_AUD_GASRC17, + CLK_AUD_GASRC18, + CLK_AUD_GASRC19, + CLK_AUD_NR_CLK, +}; + +#endif |