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authorJerome Brunet <jbrunet@baylibre.com>2021-04-07 16:59:14 +0200
committerMark Brown <broonie@kernel.org>2021-04-07 16:58:31 +0100
commit9be701ec3493d3348723a38f0c19702d710758ce (patch)
treec6ad39f7ae4abd519f72eed9f3b7355746e67953 /sound/soc/meson
parentfa74c223b6fd78a5314b4c61b9abdbed3c2185b4 (diff)
ASoC: meson: axg-fifo: add NO_PERIOD_WAKEUP support
On the AXG family, the fifo irq is not necessary for the HW to operate. It is just used to notify that a period has elapsed. If userpace does not care for these wakeups (such as pipewire), we are just wasting CPU cycles. Add support for NO_PERIOD_WAKEUP and disable irq when they are no needed. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20210407145914.311479-1-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/meson')
-rw-r--r--sound/soc/meson/axg-fifo.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/sound/soc/meson/axg-fifo.c b/sound/soc/meson/axg-fifo.c
index b2e867113226..b9af2d513e09 100644
--- a/sound/soc/meson/axg-fifo.c
+++ b/sound/soc/meson/axg-fifo.c
@@ -27,8 +27,8 @@ static struct snd_pcm_hardware axg_fifo_hw = {
SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
- SNDRV_PCM_INFO_PAUSE),
-
+ SNDRV_PCM_INFO_PAUSE |
+ SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
.formats = AXG_FIFO_FORMATS,
.rate_min = 5512,
.rate_max = 192000,
@@ -113,7 +113,7 @@ int axg_fifo_pcm_hw_params(struct snd_soc_component *component,
{
struct snd_pcm_runtime *runtime = ss->runtime;
struct axg_fifo *fifo = axg_fifo_data(ss);
- unsigned int burst_num, period, threshold;
+ unsigned int burst_num, period, threshold, irq_en;
dma_addr_t end_ptr;
period = params_period_bytes(params);
@@ -142,10 +142,11 @@ int axg_fifo_pcm_hw_params(struct snd_soc_component *component,
regmap_field_write(fifo->field_threshold,
threshold ? threshold - 1 : 0);
- /* Enable block count irq */
+ /* Enable irq if necessary */
+ irq_en = runtime->no_period_wakeup ? 0 : FIFO_INT_COUNT_REPEAT;
regmap_update_bits(fifo->map, FIFO_CTRL0,
CTRL0_INT_EN(FIFO_INT_COUNT_REPEAT),
- CTRL0_INT_EN(FIFO_INT_COUNT_REPEAT));
+ CTRL0_INT_EN(irq_en));
return 0;
}