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authorSébastien Szymanski <sebastien.szymanski@armadeus.com>2018-09-06 11:16:00 +0200
committerMark Brown <broonie@kernel.org>2018-09-10 15:49:02 +0100
commit90a3b7f8aba3011badacd6d8121e03aa24ac79d1 (patch)
tree9a5adbe12f7e4f3bb7a7ad6298dcff262bb65cb1 /sound
parent2a665dba016d5493c7d826fec82b0cb643b30d42 (diff)
ASoC: cs4265: fix MMTLR Data switch control
The MMTLR bit is in the CS4265_SPDIF_CTL2 register at address 0x12 bit 0 and not at address 0x0 bit 1. Fix this. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/codecs/cs4265.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/sound/soc/codecs/cs4265.c b/sound/soc/codecs/cs4265.c
index 275677de669f..407554175282 100644
--- a/sound/soc/codecs/cs4265.c
+++ b/sound/soc/codecs/cs4265.c
@@ -157,8 +157,8 @@ static const struct snd_kcontrol_new cs4265_snd_controls[] = {
SOC_SINGLE("Validity Bit Control Switch", CS4265_SPDIF_CTL2,
3, 1, 0),
SOC_ENUM("SPDIF Mono/Stereo", spdif_mono_stereo_enum),
- SOC_SINGLE("MMTLR Data Switch", 0,
- 1, 1, 0),
+ SOC_SINGLE("MMTLR Data Switch", CS4265_SPDIF_CTL2,
+ 0, 1, 0),
SOC_ENUM("Mono Channel Select", spdif_mono_select_enum),
SND_SOC_BYTES("C Data Buffer", CS4265_C_DATA_BUFF, 24),
};