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authorJeeja KP <jeeja.kp@intel.com>2016-02-03 17:59:53 +0530
committerMark Brown <broonie@kernel.org>2016-02-04 11:36:14 +0000
commit6e3ffa00424e198d2f0c628e7575c5adefeda3d7 (patch)
treebc5ff6048a2cf4d51d8d14b3e7f50f020e8e2407 /sound
parentde1fedf25b075664320010789ede2a0f9f4de07d (diff)
ASoC: Intel: Skylake: Fix stereo DMIC record
DMIC BE can have 2 or 4 channels supported. The DMIC fixup needs to take this into account. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/intel/boards/skl_rt286.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/sound/soc/intel/boards/skl_rt286.c b/sound/soc/intel/boards/skl_rt286.c
index 7396ddb427d8..2cbcbe412661 100644
--- a/sound/soc/intel/boards/skl_rt286.c
+++ b/sound/soc/intel/boards/skl_rt286.c
@@ -212,7 +212,10 @@ static int skylake_dmic_fixup(struct snd_soc_pcm_runtime *rtd,
{
struct snd_interval *channels = hw_param_interval(params,
SNDRV_PCM_HW_PARAM_CHANNELS);
- channels->min = channels->max = 4;
+ if (params_channels(params) == 2)
+ channels->min = channels->max = 2;
+ else
+ channels->min = channels->max = 4;
return 0;
}