diff options
| author | Andi Kleen <ak@linux.intel.com> | 2018-01-18 04:51:14 -0800 |
|---|---|---|
| committer | Arnaldo Carvalho de Melo <acme@redhat.com> | 2018-01-25 06:36:58 -0300 |
| commit | 194b6fa41a06273166c5016980a67121bd1460c6 (patch) | |
| tree | e931e4af5e46fbab27434c2862f99a25bfca6073 /tools/perf/pmu-events/arch/x86/ivytown/other.json | |
| parent | c955cd2b04200cae6a00284d6c6cda09c6eeaced (diff) | |
perf vendor events intel: Update IvyTown events to V20
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Link: https://lkml.kernel.org/r/20180118234518.GA27753@tassilo.jf.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/ivytown/other.json')
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/ivytown/other.json | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/tools/perf/pmu-events/arch/x86/ivytown/other.json b/tools/perf/pmu-events/arch/x86/ivytown/other.json index 9c2dd0511a32..4eb83ee40412 100644 --- a/tools/perf/pmu-events/arch/x86/ivytown/other.json +++ b/tools/perf/pmu-events/arch/x86/ivytown/other.json @@ -10,16 +10,6 @@ "CounterHTOff": "0,1,2,3,4,5,6,7" }, { - "PublicDescription": "Unhalted core cycles when the thread is not in ring 0.", - "EventCode": "0x5C", - "Counter": "0,1,2,3", - "UMask": "0x2", - "EventName": "CPL_CYCLES.RING123", - "SampleAfterValue": "2000003", - "BriefDescription": "Unhalted core cycles when thread is in rings 1, 2, or 3", - "CounterHTOff": "0,1,2,3,4,5,6,7" - }, - { "PublicDescription": "Number of intervals between processor halts while thread is in ring 0.", "EventCode": "0x5C", "Counter": "0,1,2,3", @@ -32,6 +22,16 @@ "CounterHTOff": "0,1,2,3,4,5,6,7" }, { + "PublicDescription": "Unhalted core cycles when the thread is not in ring 0.", + "EventCode": "0x5C", + "Counter": "0,1,2,3", + "UMask": "0x2", + "EventName": "CPL_CYCLES.RING123", + "SampleAfterValue": "2000003", + "BriefDescription": "Unhalted core cycles when thread is in rings 1, 2, or 3", + "CounterHTOff": "0,1,2,3,4,5,6,7" + }, + { "PublicDescription": "Cycles in which the L1D and L2 are locked, due to a UC lock or split lock.", "EventCode": "0x63", "Counter": "0,1,2,3", |