diff options
| author | Zhang Rui <rui.zhang@intel.com> | 2022-08-18 21:21:46 +0800 |
|---|---|---|
| committer | Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> | 2023-03-22 13:36:55 -0700 |
| commit | c5a295caefa33ce7599d7afbe7a2e9b1bc8d92a2 (patch) | |
| tree | 1719bcf36c07728b8d6fe811ae922a1a2ef08881 /tools/power/x86 | |
| parent | b1e9b87b3b5999786685eb882afb99c468af94c1 (diff) | |
tools/power/x86/intel-speed-select: Hide invalid TRL level
TRL levels with Zero ratio values is meaningless.
Prevent these TRL levels from being displayed.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Diffstat (limited to 'tools/power/x86')
| -rw-r--r-- | tools/power/x86/intel-speed-select/isst-display.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/tools/power/x86/intel-speed-select/isst-display.c b/tools/power/x86/intel-speed-select/isst-display.c index 1723e88411f5..d8b789b9656a 100644 --- a/tools/power/x86/intel-speed-select/isst-display.c +++ b/tools/power/x86/intel-speed-select/isst-display.c @@ -505,6 +505,9 @@ void isst_ctdp_display_information(struct isst_id *id, FILE *outf, int tdp_level } for (k = 0; k < trl_max_levels; k++) { + if (!ctdp_level->trl_ratios[k][0]) + continue; + snprintf(header, sizeof(header), "turbo-ratio-limits-%s", isst_get_trl_level_name(k)); format_and_print(outf, level + 2, header, NULL); |