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authorChrzaniuk, Hubert <hubert.chrzaniuk@intel.com>2016-02-10 16:35:17 +0100
committerLen Brown <len.brown@intel.com>2016-03-13 03:55:37 -0400
commit121b48bb77187cf2ed3053e147d2e6c1e864083c (patch)
tree785e5972266aabba11ed9ea5d825918acae8c929 /tools/power
parent2a0609c02e6558df6075f258af98a54a74b050ff (diff)
tools/power turbostat: Intel Xeon x200: fix erroneous bclk value
x200 does not enable any way to programmatically obtain bus clock speed. Bclk for the architecture has a fixed value of 100 MHz. At the same time x200 cannot be included in has_snb_msrs since it does not support C7 idle state. prior to this patch, MHz values reported on this chip were erroneously calculated using bclk of 133MHz, causing MHz values to be reported 33% higher than actual. Signed-off-by: Hubert Chrzaniuk <hubert.chrzaniuk@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'tools/power')
-rw-r--r--tools/power/x86/turbostat/turbostat.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index e411cc435137..652d08df5d12 100644
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -2697,7 +2697,7 @@ double slm_bclk(void)
double discover_bclk(unsigned int family, unsigned int model)
{
- if (has_snb_msrs(family, model))
+ if (has_snb_msrs(family, model) || is_knl(family, model))
return 100.00;
else if (is_slm(family, model))
return slm_bclk();